Commit 0b31cf48 authored by Vladimir Bashkirtsev's avatar Vladimir Bashkirtsev

Added support for iWave G35M

parent c3cf3383
......@@ -22,6 +22,7 @@ boot-orange-pi-pc-plus: boot-armv7
boot-odroid-hc2: boot-armv7
boot-orange-pi-3-lts: boot-armv8
boot-terasic-de10-standard: boot-armv7
boot-iwave-g35m: boot-armv8
boot-raspberry-pi-3-b: boot-armv8
boot-raspberry-pi-4-b: boot-armv8
boot-amlogic-s905x: boot-armv8
......@@ -284,6 +285,57 @@ terasicde10standard:
rm -rf /kernelconfig
rm -rf linux-5.12.10
iwaveg35m-clfs:
dd if=/dev/zero of=swap bs=1048576 count=1024
chmod 600 swap
mkswap swap
swapon swap
tar xf linux-5.12.10.tar.xz
patch -Np1 -d linux-5.12.10 < linux-5.12.10-xilinx.patch
patch -Np1 -d linux-5.12.10 < linux-5.12.10-iwaveg35m.patch
$(MAKE) -C linux-5.12.10 zynqmp_iwg35m_defconfig
/kernelconfig/initramfs/prepare
bash -c 'files=`ls -1 /kernelconfig/iwave-g35m` ; for config in $$files ; do cat /kernelconfig/iwave-g35m/$$config >> linux-5.12.10/.config ; done'
$(MAKE) -C linux-5.12.10 oldconfig
$(MAKE) -C linux-5.12.10
$(MAKE) -C linux-5.12.10 install modules_install dtbs_install
cp -v linux-5.12.10/.config /boot/config-5.12.10
ln -svf vmlinux-5.12.10 /boot/Image
ln -svf dtbs/5.12.10/xilinx/iwaveg35m.dtb /boot/machine.dtb
$(MAKE) -C ../kmod tests
rm -rf /kernelconfig
rm -rf linux-5.12.10
swapoff swap
rm -rf swap
iwaveg35m:
dd if=/dev/zero of=swap bs=1048576 count=1024
chmod 600 swap
mkswap swap
swapon swap
tar xf linux-5.12.10.tar.xz
patch -Np1 -d linux-5.12.10 < linux-5.12.10-xilinx.patch
patch -Np1 -d linux-5.12.10 < linux-5.12.10-iwaveg35m.patch
cp -v /boot/config-5.12.10 linux-5.12.10/.config
/kernelconfig/initramfs/prepare
bash -c 'files=`ls -1 /kernelconfig/iwave-g35m` ; for config in $$files ; do cat /kernelconfig/iwave-g35m/$$config >> linux-5.12.10/.config ; done'
$(MAKE) -C linux-5.12.10 oldconfig
$(MAKE) -C linux-5.12.10
rm -rf /lib/modules
rm -rf /boot/dtbs
rm -f /boot/config*
rm -f /boot/vmlinux*
rm -f /boot/System.map*
$(MAKE) -C linux-5.12.10 install modules_install dtbs_install
cp -v linux-5.12.10/.config /boot/config-5.12.10
ln -svf vmlinux-5.12.10 /boot/Image
ln -svf dtbs/5.12.10/xilinx/iwaveg35m.dtb /boot/machine.dtb
rm -f /boot/*.old
rm -rf /kernelconfig
rm -rf linux-5.12.10
swapoff swap
rm -rf swap
rpi3b-clfs:
dd if=/dev/zero of=swap bs=1048576 count=1024
chmod 600 swap
......
......@@ -122,6 +122,10 @@ CONFIG_CROSS_COMPILE="${CLFS_TARGET}"
<delete dir="${makedir}"/>
</target>
<target name="boot-linux-iwave-g35m">
<ant antfile="packages/linux/build.xml" target="boot-linux-armv8"/>
</target>
<target name="boot-linux-raspberry-pi-3-b">
<ant antfile="packages/linux/build.xml" target="boot-linux-armv8"/>
</target>
......
diff -uNr linux-5.12.10-xilinx/arch/arm64/boot/dts/xilinx/iwaveg35m.dts linux-5.12.10-iwaveg35m/arch/arm64/boot/dts/xilinx/iwaveg35m.dts
--- linux-5.12.10-xilinx/arch/arm64/boot/dts/xilinx/iwaveg35m.dts 1970-01-01 00:00:00.000000000 +0000
+++ linux-5.12.10-iwaveg35m/arch/arm64/boot/dts/xilinx/iwaveg35m.dts 2025-01-26 04:19:56.061592446 +0000
@@ -0,0 +1,490 @@
+/dts-v1/;
+#include "zynqmp.dtsi"
+#include "zynqmp-clk-ccf.dtsi"
+/ {
+ chosen {
+ bootargs = "console=ttyPS0,115200 earlyprintk root=/dev/ram";
+ stdout-path = "serial0:115200n8";
+ };
+
+ aliases {
+ ethernet0 = &gem0;
+ i2c0 = &i2c0;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ spi0 = &spi0;
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x7ff00000>, <0x00000008 0x00000000 0x0 0x80000000>;
+ };
+
+ regulators {
+ compatible = "simple-bus";
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ regulator_ssd_vqmmc: regulator_ssd_vqmmc {
+ compatible = "regulator-gpio";
+ regulator-name = "ssd_vqmmc";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-type = "voltage";
+ gpios = <&gpio 43 GPIO_ACTIVE_HIGH>;
+ gpios-states = <0x00>;
+ states = <3300000 0x00 1800000 0x01>;
+ };
+
+ regulator_vbus: regulator-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "vbus_5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ off-on-delay-us = <20000>;
+ };
+ };
+
+ reserved-memory {
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+
+ rpu0vdev0vring0: rpu0vdev0vring0@70040000 {
+ no-map;
+ reg = <0x00 0x70040000 0x00 0x4000>;
+ };
+
+ rpu0vdev0vring1: rpu0vdev0vring1@70044000 {
+ no-map;
+ reg = <0x00 0x70044000 0x00 0x4000>;
+ };
+
+ rpu0vdev0buffer: rpu0vdev0buffer@70048000 {
+ no-map;
+ reg = <0x00 0x70048000 0x00 0x100000>;
+ };
+
+ rproc: rproc@70000000 {
+ no-map;
+ reg = <0x00 0x70000000 0x00 0x40000>;
+ };
+ };
+
+ tcm_0a@ffe00000 {
+ no-map;
+ reg = <0x00 0xffe00000 0x00 0x10000>;
+ status = "okay";
+ compatible = "mmio-sram";
+ power-domain = <&zynqmp_firmware 0x0f>;
+ };
+
+ tcm_0b@ffe20000 {
+ no-map;
+ reg = <0x00 0xffe20000 0x00 0x10000>;
+ status = "okay";
+ compatible = "mmio-sram";
+ power-domain = <&zynqmp_firmware 0x10>;
+ };
+
+ rf5ss@ff9a0000 {
+ compatible = "xlnx,zynqmp-r5-remoteproc";
+ xlnx,cluster-mode = <1>;
+ ranges;
+ reg = <0x00 0xff9a0000 0x00 0x10000>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ r5f_0 {
+ compatible = "xilinx,r5f";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ sram = <0x40 0x41>;
+ memory-region = <&rproc &rpu0vdev0buffer &rpu0vdev0vring0 &rpu0vdev0vring1>;
+ power-domain = <&zynqmp_firmware 0x07>;
+ mboxes = <&ipi1_mailbox_pmu1 0>, <&ipi1_mailbox_pmu1 1>;
+ mbox-names = "tx", "rx";
+ };
+ };
+
+ zynqmp_ipi1 {
+ compatible = "xlnx,zynqmp-ipi-mailbox";
+ interrupt-parent = <&gic>;
+ interrupts = <0 29 4>;
+ xlnx,ipi-id = <7>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ ipi1_mailbox_pmu1: mailbox@ff990600 {
+ reg = <0xff990600 0x20 0xff990620 0x20 0xff9900c0 0x20 0xff9900e0 0x20>;
+ reg-names = "local_request_region",
+ "local_response_region",
+ "remote_request_region",
+ "remote_response_region";
+ #mbox-cells = <1>;
+ xlnx,ipi-id = <1>;
+ };
+ };
+
+ fmc {
+ fmc-vadj-millivolt = <1800>;
+ fmc-prsnt-m2c = <37 0 0>;
+ fmc-vcc-adj = <37 5 0>;
+ fmc-vcc-12v = <37 3 0>;
+ fmc-vcc-3v3 = <37 4 0>;
+ fmc-pg-c2m = <37 12 0>;
+ };
+
+ fmc_plus {
+ vadj-millivolt = <1800>;
+ prsnt-m2c = <37 1 0>;
+ vcc-adj = <37 6 0>;
+ vcc-12v = <37 8 0>;
+ vcc-3v3 = <37 9 0>;
+ pg-c2m = <37 13 0>;
+ };
+
+ retimer_clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <148500000>;
+ };
+
+ cpu_opp_table {
+ opp00 {
+ opp-hz = <0x00 329166666>;
+ };
+
+ opp01 {
+ opp-hz = <0x00 438888888>;
+ };
+
+ opp02 {
+ opp-hz = <0x00 658333333>;
+ };
+
+ opp03 {
+ opp-hz = <0x00 1316666666>;
+ };
+ };
+};
+
+&cci {
+ status = "okay";
+};
+
+&fpd_dma_chan1 {
+ status = "okay";
+};
+
+&fpd_dma_chan2 {
+ status = "okay";
+};
+
+&fpd_dma_chan3 {
+ status = "okay";
+};
+
+&fpd_dma_chan4 {
+ status = "okay";
+};
+
+&fpd_dma_chan5 {
+ status = "okay";
+};
+
+&fpd_dma_chan6 {
+ status = "okay";
+};
+
+&fpd_dma_chan7 {
+ status = "okay";
+};
+
+&fpd_dma_chan8 {
+ status = "okay";
+};
+
+&gic {
+ num_cpus = <2>;
+ num_interrupts = <96>;
+};
+
+&gpu {
+ status = "okay";
+ xlnx,tz-nonsecure = <1>;
+};
+
+&lpd_dma_chan1 {
+ status = "okay";
+};
+
+&lpd_dma_chan2 {
+ status = "okay";
+};
+
+&lpd_dma_chan3 {
+ status = "okay";
+};
+
+&lpd_dma_chan4 {
+ status = "okay";
+};
+
+&lpd_dma_chan5 {
+ status = "okay";
+};
+
+&lpd_dma_chan6 {
+ status = "okay";
+};
+
+&lpd_dma_chan7 {
+ status = "okay";
+};
+
+&lpd_dma_chan8 {
+ status = "okay";
+};
+
+&gem0 {
+ status = "okay";
+ phy-mode = "rgmii-id";
+ xlnx,ptp-enet-clock = <0>;
+ local-mac-address = [00 01 02 03 04 05];
+ phy-handle = <&phy1>; /* u198 */
+ phy-reset-gpio = <&gpio 42 GPIO_ACTIVE_LOW>;
+ phy-reset-active-low;
+ phy-reset-duration = <20>;
+ phy1: phy@1 {
+ reg = <1>;
+ compatible = "ethernet-phy-id004d.d074";
+ ti,rx-internal-delay = <0x8>;
+ ti,tx-internal-delay = <0xa>;
+ ti,fifo-depth = <1>;
+ ti,rxctrl-strap-worka;
+ at803x,led-act-blind-workaround;
+ at803x,eee-disabled;
+ at803x,vddio-1p8v;
+ interrupt-parent = <&gpio>;
+ interrupts = <12 8>;
+ };
+};
+
+&gpio {
+ status = "okay";
+ emio-gpio-width = <32>;
+ gpio-mask-high = <0x0000>;
+ gpio-mask-low = <0x5600>;
+};
+
+&i2c0 {
+ status = "okay";
+
+ da9062@58 {
+ compatible = "dlg,da9062";
+ reg = <0x58>;
+
+ rtc {
+ compatible = "dlg,da9062-rtc";
+ };
+
+ gpio {
+ compatible = "dlg,da9062-gpio";
+ };
+ };
+
+ typec-portc@22 {
+ compatible = "fcs,fusb302";
+ reg = <0x22>;
+ fcs,int_n = <0x15 0x4e 0x08>;
+ fcs,cc = <0x15 0x4f 0x00>;
+ fcs,power_en = <0x15 0x19 0x00>;
+ vbus-supply = <&regulator_vbus>;
+ status = "okay";
+ };
+
+ hdmi-retimer@5b {
+ status = "okay";
+ compatible = "ti,dp159";
+ reg = <0x5b>;
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ #clock-cells = <0x00>;
+ };
+
+ msd9546@70 {
+ compatible = "nxp,pca9546";
+ reg = <0x70>;
+ status = "okay";
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+
+ i2c@0 {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ reg = <0x00>;
+
+ gpio@23 {
+ compatible = "ti,tca9535";
+ reg = <0x23>;
+ #gpio-cells = <0x02>;
+ gpio-controller;
+ };
+ };
+
+ i2c@1 {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ reg = <0x01>;
+ };
+
+ i2c@2 {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ reg = <0x02>;
+
+ gpio@20 {
+ compatible = "ti,tca6416";
+ reg = <0x20>;
+ #gpio-cells = <0x02>;
+ gpio-controller;
+ };
+
+ gpio@21 {
+ compatible = "ti,tca6416";
+ reg = <0x21>;
+ #gpio-cells = <0x02>;
+ gpio-controller;
+ };
+ };
+
+ i2c@3 {
+ #address-cells = <0x01>;
+ #size-cells = <0x00>;
+ reg = <0x03>;
+
+ eeprom@51 {
+ compatible = "atmel,24c32";
+ reg = <0x51>;
+ pagesize = <0x20>;
+ address-width = <16>;
+ size = <0x8000>;
+ };
+
+ eeprom@52 {
+ compatible = "atmel,24c32";
+ reg = <0x52>;
+ pagesize = <0x20>;
+ address-width = <16>;
+ size = <0x8000>;
+ };
+ };
+ };
+};
+
+&psgtr {
+ status = "okay";
+};
+
+&sdhci0 {
+ status = "okay";
+ clock-frequency = <187500000>;
+ xlnx,mio-bank = <0>;
+ bus-width = <8>;
+};
+
+&sdhci1 {
+ status = "okay";
+ clock-frequency = <200000000>;
+ xlnx,mio-bank = <1>;
+ bus-width = <4>;
+ xlnx,has-cd = <1>;
+ vqmmc-supply = <&regulator_ssd_vqmmc>;
+};
+
+&spi0 {
+ status = "okay";
+ is-decoded-cs = <0>;
+ num-cs = <1>;
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ reg = <0x00>;
+ spi-max-frequency = <100000000>;
+ };
+};
+
+&ttc0 {
+ status = "okay";
+};
+
+&ttc1 {
+ status = "okay";
+};
+
+&ttc2 {
+ status = "okay";
+};
+
+&ttc3 {
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+ cts-override;
+ device_type = "serial";
+ port-number = <0>;
+};
+
+&uart1 {
+ status = "okay";
+ cts-override;
+ device_type = "serial";
+ port-number = <1>;
+};
+
+&usb0 {
+ status = "okay";
+ xlnx,tz-nonsecure = <1>;
+ xlnx,usb-polarity = <0>;
+ xlnx,usb-reset-io = <0x2a>;
+ xlnx,usb-reset-mode = <1>;
+ xlnx,usb-reset = <50000000>;
+};
+
+&dwc3_0 {
+ status = "okay";
+ snps,resume-hs-terminations;
+ dr_mode = "otg";
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+ maximum-speed = "super-speed";
+};
+
+&watchdog0 {
+ status = "okay";
+ timeout-sec = <70>;
+};
+
+&lpd_watchdog {
+ status = "okay";
+};
+
+&xilinx_ams {
+ status = "okay";
+};
+
+&ams_ps {
+ status = "okay";
+};
+
+&ams_pl {
+ status = "okay";
+};
+
+&video_clk {
+ clock-frequency = <33333000>;
+};
diff -uNr linux-5.12.10-xilinx/arch/arm64/boot/dts/xilinx/Makefile linux-5.12.10-iwaveg35m/arch/arm64/boot/dts/xilinx/Makefile
--- linux-5.12.10-xilinx/arch/arm64/boot/dts/xilinx/Makefile 2025-01-26 04:22:12.308369464 +0000
+++ linux-5.12.10-iwaveg35m/arch/arm64/boot/dts/xilinx/Makefile 2025-01-26 04:19:56.061592446 +0000
@@ -88,3 +88,6 @@
dtb-$(CONFIG_ARCH_ZYNQMP) += versal-net-emu-rev1.9.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += versal-net-ipp-rev1.9-ospi.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += versal-net-ipp-rev1.9.dtb
+
+# iWave Systems
+dtb-$(CONFIG_ARCH_ZYNQMP) += iwaveg35m.dtb
diff -uNr linux-5.12.10-xilinx/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi linux-5.12.10-iwaveg35m/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
--- linux-5.12.10-xilinx/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi 2025-01-26 04:22:12.336370034 +0000
+++ linux-5.12.10-iwaveg35m/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi 2025-01-26 04:19:56.061592446 +0000
@@ -67,13 +67,6 @@
#clock-cells = <0>;
clock-frequency = <27000000>;
};
-
- dp_aclk: dp_aclk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <100000000>;
- clock-accuracy = <100>;
- };
};
&zynqmp_firmware {
@@ -133,7 +126,7 @@
};
&gpu {
- clocks = <&zynqmp_clk GPU_REF>, <&zynqmp_clk GPU_PP0_REF>, <&zynqmp_clk GPU_PP1_REF>;
+ clocks = <&zynqmp_clk GPU_REF>, <&zynqmp_clk GPU_PP0_REF>;
};
&lpd_dma_chan1 {
@@ -176,24 +169,28 @@
clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM0_REF>,
<&zynqmp_clk GEM0_TX>, <&zynqmp_clk GEM0_RX>,
<&zynqmp_clk GEM_TSU>;
+ assigned-clocks = <&zynqmp_clk GEM_TSU>;
};
&gem1 {
clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM1_REF>,
<&zynqmp_clk GEM1_TX>, <&zynqmp_clk GEM1_RX>,
<&zynqmp_clk GEM_TSU>;
+ assigned-clocks = <&zynqmp_clk GEM_TSU>;
};
&gem2 {
clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM2_REF>,
<&zynqmp_clk GEM2_TX>, <&zynqmp_clk GEM2_RX>,
<&zynqmp_clk GEM_TSU>;
+ assigned-clocks = <&zynqmp_clk GEM_TSU>;
};
&gem3 {
clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM3_REF>,
<&zynqmp_clk GEM3_TX>, <&zynqmp_clk GEM3_RX>,
<&zynqmp_clk GEM_TSU>;
+ assigned-clocks = <&zynqmp_clk GEM_TSU>;
};
&gpio {
@@ -314,9 +311,9 @@
};
&zynqmp_dpsub {
- clocks = <&dp_aclk>,
- <&zynqmp_clk DP_AUDIO_REF>,
- <&zynqmp_clk DP_VIDEO_REF>;
+ clocks = <&zynqmp_clk TOPSW_LSBUS>,
+ <&zynqmp_clk DP_AUDIO_REF>,
+ <&zynqmp_clk DP_VIDEO_REF>;
assigned-clocks = <&zynqmp_clk DP_STC_REF>,
<&zynqmp_clk DP_AUDIO_REF>,
<&zynqmp_clk DP_VIDEO_REF>; /* rpll, rpll, vpll */
@@ -325,7 +322,3 @@
&zynqmp_dp_snd_codec0 {
clocks = <&zynqmp_clk DP_AUDIO_REF>;
};
-
-&zynqmp_pcap {
- clocks = <&zynqmp_clk PCAP>;
-};
diff -uNr linux-5.12.10-xilinx/arch/arm64/boot/dts/xilinx/zynqmp-clk.dtsi linux-5.12.10-iwaveg35m/arch/arm64/boot/dts/xilinx/zynqmp-clk.dtsi
--- linux-5.12.10-xilinx/arch/arm64/boot/dts/xilinx/zynqmp-clk.dtsi 2025-01-26 04:22:12.340370116 +0000
+++ linux-5.12.10-iwaveg35m/arch/arm64/boot/dts/xilinx/zynqmp-clk.dtsi 2025-01-26 04:19:56.065592527 +0000
@@ -47,13 +47,6 @@
clock-frequency = <600000000>;
};
- dp_aclk: clock0 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <100000000>;
- clock-accuracy = <100>;
- };
-
dp_aud_clk: clock1 {
compatible = "fixed-clock";
#clock-cells = <0>;
diff -uNr linux-5.12.10-xilinx/arch/arm64/boot/dts/xilinx/zynqmp.dtsi linux-5.12.10-iwaveg35m/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
--- linux-5.12.10-xilinx/arch/arm64/boot/dts/xilinx/zynqmp.dtsi 2025-01-26 04:22:12.344370197 +0000
+++ linux-5.12.10-iwaveg35m/arch/arm64/boot/dts/xilinx/zynqmp.dtsi 2025-01-26 04:19:56.065592527 +0000
@@ -33,6 +33,7 @@
operating-points-v2 = <&cpu_opp_table>;
reg = <0x0>;
cpu-idle-states = <&CPU_SLEEP_0>;
+ next-level-cache = <&l2_cache>;
};
cpu1: cpu@1 {
@@ -42,6 +43,7 @@
reg = <0x1>;
operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP_0>;
+ next-level-cache = <&l2_cache>;
};
cpu2: cpu@2 {
@@ -51,6 +53,7 @@
reg = <0x2>;
operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP_0>;
+ next-level-cache = <&l2_cache>;
};
cpu3: cpu@3 {
@@ -60,6 +63,12 @@
reg = <0x3>;
operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP_0>;
+ next-level-cache = <&l2_cache>;
+ };
+
+ l2_cache: l2-cache {
+ compatible = "cache";
+ cache-level = <2>;
};
idle-states {
@@ -101,7 +110,7 @@
};
};
- zynqmp_ipi: zynqmp_ipi {
+ zynqmp_ipi: zynqmp-ipi {
u-boot,dm-pre-reloc;
compatible = "xlnx,zynqmp-ipi-mailbox";
interrupt-parent = <&gic>;
@@ -111,7 +120,7 @@
#size-cells = <2>;
ranges;
- ipi_mailbox_pmu1: mailbox@ff990400 {
+ ipi_mailbox_pmu1: mailbox@ff9905c0 {
u-boot,dm-pre-reloc;
reg = <0x0 0xff9905c0 0x0 0x20>,
<0x0 0xff9905e0 0x0 0x20>,
@@ -139,6 +148,10 @@
<0 144 4>,
<0 145 4>,
<0 146 4>;
+ interrupt-affinity = <&cpu0>,
+ <&cpu1>,
+ <&cpu2>,
+ <&cpu3>;
};
psci {
@@ -149,9 +162,9 @@
firmware {
zynqmp_firmware: zynqmp-firmware {
compatible = "xlnx,zynqmp-firmware";
- #power-domain-cells = <1>;
- method = "smc";
u-boot,dm-pre-reloc;
+ method = "smc";
+ #power-domain-cells = <1>;
zynqmp_power: zynqmp-power {
u-boot,dm-pre-reloc;
@@ -162,72 +175,67 @@
mbox-names = "tx", "rx";
};
- nvmem_firmware {
+ nvmem_firmware: nvmem-firmware {
compatible = "xlnx,zynqmp-nvmem-fw";
#address-cells = <1>;
#size-cells = <1>;
- soc_revision: soc_revision@0 {
+ soc_revision: soc-revision@0 {
reg = <0x0 0x4>;
};
/* efuse access */
- efuse_dna: efuse_dna@c {
+ efuse_dna: efuse-dna@c {
reg = <0xc 0xc>;
};
- efuse_usr0: efuse_usr0@20 {
+ efuse_usr0: efuse-usr0@20 {
reg = <0x20 0x4>;
};
- efuse_usr1: efuse_usr1@24 {
+ efuse_usr1: efuse-usr1@24 {
reg = <0x24 0x4>;
};
- efuse_usr2: efuse_usr2@28 {
+ efuse_usr2: efuse-usr2@28 {
reg = <0x28 0x4>;
};
- efuse_usr3: efuse_usr3@2c {
+ efuse_usr3: efuse-usr3@2c {
reg = <0x2c 0x4>;
};
- efuse_usr4: efuse_usr4@30 {
+ efuse_usr4: efuse-usr4@30 {
reg = <0x30 0x4>;
};
- efuse_usr5: efuse_usr5@34 {
+ efuse_usr5: efuse-usr5@34 {
reg = <0x34 0x4>;
};
- efuse_usr6: efuse_usr6@38 {
+ efuse_usr6: efuse-usr6@38 {
reg = <0x38 0x4>;
};
- efuse_usr7: efuse_usr7@3c {
+ efuse_usr7: efuse-usr7@3c {
reg = <0x3c 0x4>;
};
- efuse_miscusr: efuse_miscusr@40 {
+ efuse_miscusr: efuse-miscusr@40 {
reg = <0x40 0x4>;
};
- efuse_chash: efuse_chash@50 {
+ efuse_chash: efuse-chash@50 {
reg = <0x50 0x4>;
};
- efuse_pufmisc: efuse_pufmisc@54 {
+ efuse_pufmisc: efuse-pufmisc@54 {
reg = <0x54 0x4>;
};
- efuse_sec: efuse_sec@58 {
+ efuse_sec: efuse-sec@58 {
reg = <0x58 0x4>;
};
- efuse_spkid: efuse_spkid@5c {
+ efuse_spkid: efuse-spkid@5c {
reg = <0x5c 0x4>;
};
- efuse_ppk0hash: efuse_ppk0hash@a0 {
+ efuse_ppk0hash: efuse-ppk0hash@a0 {
reg = <0xa0 0x30>;
};
- efuse_ppk1hash: efuse_ppk1hash@d0 {
+ efuse_ppk1hash: efuse-ppk1hash@d0 {
reg = <0xd0 0x30>;
};
};
zynqmp_pcap: pcap {
compatible = "xlnx,zynqmp-pcap-fpga";
- clock-names = "ref_clk";
- };
-
- xlnx_aes: zynqmp-aes {
- compatible = "xlnx,zynqmp-aes";
};
zynqmp_reset: reset-controller {
@@ -240,14 +248,6 @@
status = "disabled";
};
- xlnx_keccak_384: sha384 {
- compatible = "xlnx,zynqmp-keccak-384";
- };
-
- xlnx_rsa: zynqmp-rsa {
- compatible = "xlnx,zynqmp-rsa";
- };
-
modepin_gpio: gpio {
compatible = "xlnx,zynqmp-gpio-modepin";
gpio-controller;
@@ -293,6 +293,7 @@
interrupt-parent = <&gic>;
tx-fifo-depth = <0x40>;
rx-fifo-depth = <0x40>;
+ resets = <&zynqmp_reset ZYNQMP_RESET_CAN0>;
power-domains = <&zynqmp_firmware PD_CAN_0>;
};
@@ -305,6 +306,7 @@
interrupt-parent = <&gic>;
tx-fifo-depth = <0x40>;
rx-fifo-depth = <0x40>;
+ resets = <&zynqmp_reset ZYNQMP_RESET_CAN1>;
power-domains = <&zynqmp_firmware PD_CAN_1>;
};
@@ -336,10 +338,10 @@
interrupt-parent = <&gic>;
interrupts = <0 124 4>;
clock-names = "clk_main", "clk_apb";
+ #dma-cells = <1>;
xlnx,bus-width = <128>;
iommus = <&smmu 0x14e8>;
power-domains = <&zynqmp_firmware PD_GDMA>;
- #dma-cells = <1>;
};
fpd_dma_chan2: dma-controller@fd510000 {
@@ -349,10 +351,10 @@
interrupt-parent = <&gic>;
interrupts = <0 125 4>;
clock-names = "clk_main", "clk_apb";
+ #dma-cells = <1>;
xlnx,bus-width = <128>;
iommus = <&smmu 0x14e9>;
power-domains = <&zynqmp_firmware PD_GDMA>;
- #dma-cells = <1>;
};
fpd_dma_chan3: dma-controller@fd520000 {
@@ -362,10 +364,10 @@
interrupt-parent = <&gic>;
interrupts = <0 126 4>;
clock-names = "clk_main", "clk_apb";
+ #dma-cells = <1>;
xlnx,bus-width = <128>;
iommus = <&smmu 0x14ea>;
power-domains = <&zynqmp_firmware PD_GDMA>;
- #dma-cells = <1>;
};
fpd_dma_chan4: dma-controller@fd530000 {
@@ -375,10 +377,10 @@
interrupt-parent = <&gic>;
interrupts = <0 127 4>;
clock-names = "clk_main", "clk_apb";
+ #dma-cells = <1>;
xlnx,bus-width = <128>;
iommus = <&smmu 0x14eb>;
power-domains = <&zynqmp_firmware PD_GDMA>;
- #dma-cells = <1>;
};
fpd_dma_chan5: dma-controller@fd540000 {
@@ -388,10 +390,10 @@
interrupt-parent = <&gic>;
interrupts = <0 128 4>;
clock-names = "clk_main", "clk_apb";
+ #dma-cells = <1>;
xlnx,bus-width = <128>;
iommus = <&smmu 0x14ec>;
power-domains = <&zynqmp_firmware PD_GDMA>;
- #dma-cells = <1>;
};
fpd_dma_chan6: dma-controller@fd550000 {
@@ -401,10 +403,10 @@
interrupt-parent = <&gic>;
interrupts = <0 129 4>;
clock-names = "clk_main", "clk_apb";
+ #dma-cells = <1>;
xlnx,bus-width = <128>;
iommus = <&smmu 0x14ed>;
power-domains = <&zynqmp_firmware PD_GDMA>;
- #dma-cells = <1>;
};
fpd_dma_chan7: dma-controller@fd560000 {
@@ -414,10 +416,10 @@
interrupt-parent = <&gic>;
interrupts = <0 130 4>;
clock-names = "clk_main", "clk_apb";
+ #dma-cells = <1>;
xlnx,bus-width = <128>;
iommus = <&smmu 0x14ee>;
power-domains = <&zynqmp_firmware PD_GDMA>;
- #dma-cells = <1>;
};
fpd_dma_chan8: dma-controller@fd570000 {
@@ -427,10 +429,10 @@
interrupt-parent = <&gic>;
interrupts = <0 131 4>;
clock-names = "clk_main", "clk_apb";
+ #dma-cells = <1>;
xlnx,bus-width = <128>;
iommus = <&smmu 0x14ef>;
power-domains = <&zynqmp_firmware PD_GDMA>;
- #dma-cells = <1>;
};
gic: interrupt-controller@f9010000 {
@@ -447,12 +449,12 @@
gpu: gpu@fd4b0000 {
status = "disabled";
- compatible = "arm,mali-400", "arm,mali-utgard";
+ compatible = "xlnx,zynqmp-mali", "arm,mali-400";
reg = <0x0 0xfd4b0000 0x0 0x10000>;
interrupt-parent = <&gic>;
interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>;
- interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
- clock-names = "gpu", "gpu_pp0", "gpu_pp1";
+ interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1", "ppmmu1";
+ clock-names = "bus", "core";
power-domains = <&zynqmp_firmware PD_GPU>;
};
@@ -467,10 +469,10 @@
interrupt-parent = <&gic>;
interrupts = <0 77 4>;
clock-names = "clk_main", "clk_apb";
+ #dma-cells = <1>;
xlnx,bus-width = <64>;
/* iommus = <&smmu 0x868>; */
power-domains = <&zynqmp_firmware PD_ADMA>;
- #dma-cells = <1>;
};
lpd_dma_chan2: dma-controller@ffa90000 {
@@ -480,10 +482,10 @@
interrupt-parent = <&gic>;
interrupts = <0 78 4>;
clock-names = "clk_main", "clk_apb";
+ #dma-cells = <1>;
xlnx,bus-width = <64>;
/* iommus = <&smmu 0x869>; */
power-domains = <&zynqmp_firmware PD_ADMA>;
- #dma-cells = <1>;
};
lpd_dma_chan3: dma-controller@ffaa0000 {
@@ -493,10 +495,10 @@
interrupt-parent = <&gic>;
interrupts = <0 79 4>;
clock-names = "clk_main", "clk_apb";
+ #dma-cells = <1>;
xlnx,bus-width = <64>;
/* iommus = <&smmu 0x86a>; */
power-domains = <&zynqmp_firmware PD_ADMA>;
- #dma-cells = <1>;
};
lpd_dma_chan4: dma-controller@ffab0000 {
@@ -506,10 +508,10 @@
interrupt-parent = <&gic>;
interrupts = <0 80 4>;
clock-names = "clk_main", "clk_apb";
+ #dma-cells = <1>;
xlnx,bus-width = <64>;
/* iommus = <&smmu 0x86b>; */
power-domains = <&zynqmp_firmware PD_ADMA>;
- #dma-cells = <1>;
};
lpd_dma_chan5: dma-controller@ffac0000 {
@@ -519,10 +521,10 @@
interrupt-parent = <&gic>;
interrupts = <0 81 4>;
clock-names = "clk_main", "clk_apb";
+ #dma-cells = <1>;
xlnx,bus-width = <64>;
/* iommus = <&smmu 0x86c>; */
power-domains = <&zynqmp_firmware PD_ADMA>;
- #dma-cells = <1>;
};
lpd_dma_chan6: dma-controller@ffad0000 {
@@ -532,10 +534,10 @@
interrupt-parent = <&gic>;
interrupts = <0 82 4>;
clock-names = "clk_main", "clk_apb";
+ #dma-cells = <1>;
xlnx,bus-width = <64>;
/* iommus = <&smmu 0x86d>; */
power-domains = <&zynqmp_firmware PD_ADMA>;
- #dma-cells = <1>;
};
lpd_dma_chan7: dma-controller@ffae0000 {
@@ -545,10 +547,10 @@
interrupt-parent = <&gic>;
interrupts = <0 83 4>;
clock-names = "clk_main", "clk_apb";
+ #dma-cells = <1>;
xlnx,bus-width = <64>;
/* iommus = <&smmu 0x86e>; */
power-domains = <&zynqmp_firmware PD_ADMA>;
- #dma-cells = <1>;
};
lpd_dma_chan8: dma-controller@ffaf0000 {
@@ -558,10 +560,10 @@
interrupt-parent = <&gic>;
interrupts = <0 84 4>;
clock-names = "clk_main", "clk_apb";
+ #dma-cells = <1>;
xlnx,bus-width = <64>;
/* iommus = <&smmu 0x86f>; */
power-domains = <&zynqmp_firmware PD_ADMA>;
- #dma-cells = <1>;
};
mc: memory-controller@fd070000 {
@@ -585,7 +587,7 @@
};
gem0: ethernet@ff0b0000 {
- compatible = "xlnx,zynqmp-gem", "cdns,zynqmp-gem", "cdns,gem";
+ compatible = "xlnx,zynqmp-gem", "cdns,gem";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 57 4>, <0 57 4>;
@@ -596,10 +598,11 @@
iommus = <&smmu 0x874>;
power-domains = <&zynqmp_firmware PD_ETH_0>;
resets = <&zynqmp_reset ZYNQMP_RESET_GEM0>;
+ reset-names = "gem0_rst";
};
gem1: ethernet@ff0c0000 {
- compatible = "xlnx,zynqmp-gem", "cdns,zynqmp-gem", "cdns,gem";
+ compatible = "xlnx,zynqmp-gem", "cdns,gem";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 59 4>, <0 59 4>;
@@ -610,10 +613,11 @@
iommus = <&smmu 0x875>;
power-domains = <&zynqmp_firmware PD_ETH_1>;
resets = <&zynqmp_reset ZYNQMP_RESET_GEM1>;
+ reset-names = "gem1_rst";
};
gem2: ethernet@ff0d0000 {
- compatible = "xlnx,zynqmp-gem", "cdns,zynqmp-gem", "cdns,gem";
+ compatible = "xlnx,zynqmp-gem", "cdns,gem";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 61 4>, <0 61 4>;
@@ -624,10 +628,11 @@
iommus = <&smmu 0x876>;
power-domains = <&zynqmp_firmware PD_ETH_2>;
resets = <&zynqmp_reset ZYNQMP_RESET_GEM2>;
+ reset-names = "gem2_rst";
};
gem3: ethernet@ff0e0000 {
- compatible = "xlnx,zynqmp-gem", "cdns,zynqmp-gem", "cdns,gem";
+ compatible = "xlnx,zynqmp-gem", "cdns,gem";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 63 4>, <0 63 4>;
@@ -638,6 +643,7 @@
iommus = <&smmu 0x877>;
power-domains = <&zynqmp_firmware PD_ETH_3>;
resets = <&zynqmp_reset ZYNQMP_RESET_GEM3>;
+ reset-names = "gem3_rst";
};
gpio: gpio@ff0a0000 {
@@ -658,6 +664,7 @@
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 17 4>;
+ clock-frequency = <400000>;
reg = <0x0 0xff020000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
@@ -669,6 +676,7 @@
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 18 4>;
+ clock-frequency = <400000>;
reg = <0x0 0xff030000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
@@ -773,12 +781,12 @@
msi-parent = <&pcie>;
reg = <0x0 0xfd0e0000 0x0 0x1000>,
<0x0 0xfd480000 0x0 0x1000>,
- <0x80 0x00000000 0x0 0x1000000>;
+ <0x80 0x00000000 0x0 0x10000000>;
reg-names = "breg", "pcireg", "cfg";
ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000>,/* non-prefetchable memory */
<0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */
- bus-range = <0x00 0xff>;
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
+ bus-range = <0x00 0xff>;
interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
<0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
<0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
@@ -848,11 +856,10 @@
interrupts = <0 48 4>;
reg = <0x0 0xff160000 0x0 0x1000>;
clock-names = "clk_xin", "clk_ahb";
- xlnx,device_id = <0>;
iommus = <&smmu 0x870>;
+ power-domains = <&zynqmp_firmware PD_SD_0>;
#clock-cells = <1>;
clock-output-names = "clk_out_sd0", "clk_in_sd0";
- power-domains = <&zynqmp_firmware PD_SD_0>;
resets = <&zynqmp_reset ZYNQMP_RESET_SDIO0>;
};
@@ -864,15 +871,14 @@
interrupts = <0 49 4>;
reg = <0x0 0xff170000 0x0 0x1000>;
clock-names = "clk_xin", "clk_ahb";
- xlnx,device_id = <1>;
iommus = <&smmu 0x871>;
+ power-domains = <&zynqmp_firmware PD_SD_1>;
#clock-cells = <1>;
clock-output-names = "clk_out_sd1", "clk_in_sd1";
- power-domains = <&zynqmp_firmware PD_SD_1>;
resets = <&zynqmp_reset ZYNQMP_RESET_SDIO1>;
};
- smmu: iommu@fd800000 {
+ smmu: smmu@fd800000 {
compatible = "arm,mmu-500";
reg = <0x0 0xfd800000 0x0 0x20000>;
#iommu-cells = <1>;
@@ -972,7 +978,7 @@
power-domains = <&zynqmp_firmware PD_UART_1>;
};
- usb0: usb0@ff9d0000 {
+ usb0: usb@ff9d0000 {
#address-cells = <2>;
#size-cells = <2>;
status = "disabled";
@@ -996,17 +1002,14 @@
interrupts = <0 65 4>, <0 69 4>, <0 75 4>;
iommus = <&smmu 0x860>;
snps,quirk-frame-length-adjustment = <0x20>;
- snps,refclk_fladj;
clock-names = "ref";
- snps,enable_guctl1_resume_quirk;
snps,enable_guctl1_ipd_quirk;
- snps,xhci-reset-on-resume;
- snps,xhci-stream-quirk;
+ snps,resume-hs-terminations;
/* dma-coherent; */
};
};
- usb1: usb1@ff9e0000 {
+ usb1: usb@ff9e0000 {
#address-cells = <2>;
#size-cells = <2>;
status = "disabled";
@@ -1029,12 +1032,9 @@
interrupts = <0 70 4>, <0 74 4>, <0 76 4>;
iommus = <&smmu 0x861>;
snps,quirk-frame-length-adjustment = <0x20>;
- snps,refclk_fladj;
clock-names = "ref";
- snps,enable_guctl1_resume_quirk;
snps,enable_guctl1_ipd_quirk;
- snps,xhci-reset-on-resume;
- snps,xhci-stream-quirk;
+ snps,resume-hs-terminations;
/* dma-coherent; */
};
};
@@ -1063,24 +1063,22 @@
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 56 4>;
- interrupt-names = "ams-irq";
reg = <0x0 0xffa50000 0x0 0x800>;
- reg-names = "ams-base";
- #address-cells = <2>;
- #size-cells = <2>;
+ #address-cells = <1>;
+ #size-cells = <1>;
#io-channel-cells = <1>;
- ranges;
+ ranges = <0 0 0xffa50800 0x800>;
- ams_ps: ams_ps@ffa50800 {
+ ams_ps: ams-ps@0 {
compatible = "xlnx,zynqmp-ams-ps";
status = "disabled";
- reg = <0x0 0xffa50800 0x0 0x400>;
+ reg = <0x0 0x400>;
};
- ams_pl: ams_pl@ffa50c00 {
+ ams_pl: ams-pl@400 {
compatible = "xlnx,zynqmp-ams-pl";
status = "disabled";
- reg = <0x0 0xffa50c00 0x0 0x400>;
+ reg = <0x400 0x400>;
};
};
@@ -1097,7 +1095,7 @@
#dma-cells = <1>;
};
- zynqmp_dpaud_setting: dp_aud@fd4ac000 {
+ zynqmp_dpaud_setting: dp-aud@fd4ac000 {
compatible = "xlnx,zynqmp-dpaud-setting", "syscon";
reg = <0x0 0xfd4ac000 0x0 0x1000>;
};
@@ -1130,24 +1128,24 @@
i2c-bus {
};
- zynqmp_dp_snd_codec0: zynqmp_dp_snd_codec0 {
+ zynqmp_dp_snd_codec0: zynqmp-dp-snd-codec0 {
compatible = "xlnx,dp-snd-codec";
clock-names = "aud_clk";
};
- zynqmp_dp_snd_pcm0: zynqmp_dp_snd_pcm0 {
+ zynqmp_dp_snd_pcm0: zynqmp-dp-snd-pcm0 {
compatible = "xlnx,dp-snd-pcm0";
dmas = <&zynqmp_dpdma 4>;
dma-names = "tx";
};
- zynqmp_dp_snd_pcm1: zynqmp_dp_snd_pcm1 {
+ zynqmp_dp_snd_pcm1: zynqmp-dp-snd-pcm1 {
compatible = "xlnx,dp-snd-pcm1";
dmas = <&zynqmp_dpdma 5>;
dma-names = "tx";
};
- zynqmp_dp_snd_card0: zynqmp_dp_snd_card {
+ zynqmp_dp_snd_card0: zynqmp-dp-snd-card {
compatible = "xlnx,dp-snd-card";
xlnx,dp-snd-pcm = <&zynqmp_dp_snd_pcm0>,
<&zynqmp_dp_snd_pcm1>;
diff -uNr linux-5.12.10-xilinx/arch/arm64/configs/zynqmp_iwg35m_defconfig linux-5.12.10-iwaveg35m/arch/arm64/configs/zynqmp_iwg35m_defconfig
--- linux-5.12.10-xilinx/arch/arm64/configs/zynqmp_iwg35m_defconfig 1970-01-01 00:00:00.000000000 +0000
+++ linux-5.12.10-iwaveg35m/arch/arm64/configs/zynqmp_iwg35m_defconfig 2025-01-26 04:19:56.069592609 +0000
@@ -0,0 +1,412 @@
+# CONFIG_XEN is not set
+# CONFIG_ARM64_CRYPTO is not set
+# CONFIG_BT is not set
+CONFIG_SYSVIPC=y
+CONFIG_AUDIT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+CONFIG_TASK_XACCT=y
+CONFIG_TASK_IO_ACCOUNTING=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=16
+CONFIG_CGROUPS=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_EMBEDDED=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_SLAB=y
+CONFIG_PROFILING=y
+CONFIG_ARCH_ZYNQMP=y
+CONFIG_NR_CPUS=8
+CONFIG_COMPAT=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
+CONFIG_CPUFREQ_DT=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MEMORY_HOTPLUG=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
+CONFIG_TRANSPARENT_HUGEPAGE=y
+CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y
+CONFIG_CMA=y
+CONFIG_CMA_SIZE_MBYTES=700
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_XFRM_USER=y
+CONFIG_NET_KEY=y
+CONFIG_NET_KEY_MIGRATE=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_SYN_COOKIES=y
+CONFIG_NETWORK_SECMARK=y
+CONFIG_NETFILTER=y
+CONFIG_NETFILTER_NETLINK_LOG=y
+CONFIG_NF_CONNTRACK=y
+CONFIG_NF_CT_NETLINK=y
+CONFIG_NETFILTER_XT_MARK=y
+CONFIG_NETFILTER_XT_TARGET_CHECKSUM=y
+CONFIG_NETFILTER_XT_TARGET_LOG=y
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+CONFIG_NETFILTER_XT_MATCH_LIMIT=y
+CONFIG_NETFILTER_XT_MATCH_MAC=y
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y
+CONFIG_NETFILTER_XT_MATCH_STATE=m
+CONFIG_IP_NF_IPTABLES=y
+CONFIG_IP_NF_FILTER=y
+CONFIG_IP_NF_TARGET_REJECT=y
+CONFIG_IP_NF_MANGLE=y
+CONFIG_IP6_NF_IPTABLES=y
+CONFIG_IP6_NF_FILTER=y
+CONFIG_IP6_NF_TARGET_REJECT=y
+CONFIG_IP6_NF_MANGLE=y
+CONFIG_BRIDGE_NF_EBTABLES=y
+CONFIG_BRIDGE_EBT_T_FILTER=y
+CONFIG_BRIDGE_EBT_T_NAT=y
+CONFIG_BRIDGE_EBT_MARK_T=y
+CONFIG_BRIDGE=y
+CONFIG_NET_PKTGEN=y
+CONFIG_CAN=y
+CONFIG_CAN_XILINXCAN=y
+CONFIG_CFG80211=m
+CONFIG_NL80211_TESTMODE=y
+CONFIG_CFG80211_CERTIFICATION_ONUS=y
+CONFIG_CFG80211_REG_CELLULAR_HINTS=y
+CONFIG_CFG80211_REG_RELAX_NO_IR=y
+CONFIG_CFG80211_WEXT=y
+CONFIG_MAC80211=m
+CONFIG_MAC80211_LEDS=y
+CONFIG_MAC80211_MESSAGE_TRACING=y
+CONFIG_MAC80211_DEBUG_MENU=y
+CONFIG_RFKILL=y
+CONFIG_RFKILL_INPUT=y
+CONFIG_RFKILL_GPIO=y
+CONFIG_NET_9P=y
+CONFIG_PCI=y
+CONFIG_PCIE_XILINX_NWL=y
+CONFIG_OF_OVERLAY=y
+CONFIG_OF_CONFIGFS=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=65536
+CONFIG_XILINX_JESD204B=y
+CONFIG_XILINX_JESD204B_PHY=y
+CONFIG_EEPROM_AT24=y
+CONFIG_EEPROM_AT25=y
+CONFIG_TI_ST=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_ATA=y
+CONFIG_SATA_AHCI_PLATFORM=y
+CONFIG_AHCI_CEVA=y
+# CONFIG_ATA_SFF is not set
+CONFIG_NETDEVICES=y
+CONFIG_TUN=y
+CONFIG_MACB=y
+CONFIG_XILINX_EMACLITE=y
+CONFIG_XILINX_SDFEC=y
+CONFIG_AMD_PHY=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_CONNECTOR=y
+CONFIG_ZYNQMP_FIRMWARE_DEBUG=y
+CONFIG_ZYNQMP_FIRMWARE=y
+CONFIG_BCM7XXX_PHY=y
+CONFIG_BCM87XX_PHY=y
+CONFIG_CICADA_PHY=y
+CONFIG_DAVICOM_PHY=y
+CONFIG_BROADCOM_PHY=y
+CONFIG_ICPLUS_PHY=y
+CONFIG_LSI_ET1011C_PHY=y
+CONFIG_MARVELL_PHY=y
+CONFIG_MICREL_PHY=y
+CONFIG_LXT_PHY=y
+CONFIG_NATIONAL_PHY=y
+CONFIG_AT803X_PHY=y
+CONFIG_QSEMI_PHY=y
+CONFIG_REALTEK_PHY=y
+CONFIG_SMSC_PHY=y
+CONFIG_STE10XP=y
+CONFIG_DP83867_PHY=y
+CONFIG_VITESSE_PHY=y
+CONFIG_XILINX_PHY=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM=y
+CONFIG_XILINX_GMII2RGMII=y
+CONFIG_USB_USBNET=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SERIAL_XILINX_PS_UART=y
+CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
+CONFIG_I2C_CADENCE=y
+CONFIG_I2C_XILINX=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_XILINX=y
+CONFIG_GPIO_ZYNQ=y
+CONFIG_GPIO_PCA953X=y
+CONFIG_SENSORS_IIO_HWMON=y
+CONFIG_PMBUS=y
+CONFIG_WATCHDOG=y
+CONFIG_XILINX_WATCHDOG=y
+CONFIG_CADENCE_WATCHDOG=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_REGULATOR_GPIO=y
+CONFIG_MEDIA_SUPPORT=y
+CONFIG_MEDIA_USB_SUPPORT=y
+CONFIG_USB_VIDEO_CLASS=y
+CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_VIDEO_XILINX=y
+CONFIG_VIDEO_XILINX_AXI4S_SWITCH=y
+CONFIG_VIDEO_XILINX_CFA=y
+CONFIG_VIDEO_XILINX_CRESAMPLE=y
+CONFIG_VIDEO_XILINX_DEMOSAIC=y
+CONFIG_VIDEO_XILINX_GAMMA=y
+CONFIG_VIDEO_XILINX_HLS=y
+CONFIG_VIDEO_XILINX_REMAPPER=y
+CONFIG_VIDEO_XILINX_RGB2YUV=y
+CONFIG_VIDEO_XILINX_SCALER=y
+CONFIG_VIDEO_XILINX_MULTISCALER=y
+CONFIG_VIDEO_XILINX_SDIRXSS=y
+CONFIG_VIDEO_XILINX_SWITCH=y
+CONFIG_VIDEO_XILINX_TPG=y
+CONFIG_VIDEO_XILINX_VPSS_CSC=y
+CONFIG_VIDEO_XILINX_VPSS_SCALER=y
+CONFIG_VIDEO_XILINX_M2M=y
+CONFIG_VIDEO_XILINX_HDMI21RXSS=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_DRM=y
+CONFIG_DRM_XLNX=y
+CONFIG_DRM_XLNX_BRIDGE=y
+CONFIG_DRM_XLNX_BRIDGE_DEBUG_FS=y
+CONFIG_DRM_XLNX_DSI=y
+CONFIG_DRM_XLNX_MIXER=y
+CONFIG_DRM_XLNX_PL_DISP=y
+CONFIG_DRM_XLNX_SDI=y
+CONFIG_DRM_XLNX_BRIDGE_CSC=y
+CONFIG_DRM_XLNX_BRIDGE_SCALER=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_USB_AUDIO=y
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_XILINX_DP=y
+CONFIG_SND_SOC_XILINX_SDI=y
+CONFIG_SND_SOC_XILINX_I2S=y
+CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER=y
+CONFIG_SND_SOC_XILINX_SPDIF=y
+CONFIG_SND_SOC_XILINX_PL_SND_CARD=y
+CONFIG_DRM_ZYNQMP_DPSUB=y
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_OF_ARASAN=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_ONESHOT=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
+CONFIG_LEDS_TRIGGER_CPU=y
+CONFIG_LEDS_TRIGGER_GPIO=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_LEDS_TRIGGER_TRANSIENT=y
+CONFIG_LEDS_TRIGGER_CAMERA=y
+CONFIG_EDAC=y
+CONFIG_EDAC_SYNOPSYS=y
+CONFIG_EDAC_ZYNQMP_OCM=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_ZYNQMP=y
+CONFIG_DMATEST=y
+CONFIG_UIO_XILINX_APM=y
+CONFIG_STAGING=y
+CONFIG_XILINX_FCLK=y
+CONFIG_COMMON_CLK_SI5341=y
+CONFIG_COMMON_CLK_XLNX_CLKWZRD=y
+CONFIG_IIO=y
+CONFIG_XILINX_INTC=y
+CONFIG_RESET_CONTROLLER=y
+CONFIG_ARM_CCI_PMU=y
+CONFIG_NVMEM_ZYNQMP=y
+CONFIG_FPGA=y
+CONFIG_FPGA_REGION=y
+CONFIG_OF_FPGA_REGION=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_EXT4_FS_SECURITY=y
+CONFIG_BTRFS_FS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_NFSD=y
+CONFIG_NFS_V4_1=y
+CONFIG_NFS_V4_2=y
+CONFIG_ROOT_NFS=y
+CONFIG_DMA_CMA=y
+CONFIG_PRINTK_TIME=y
+CONFIG_DEBUG_FS=y
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_FTRACE is not set
+# CONFIG_STRICT_DEVMEM is not set
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_ZYNQMP_IWG35M_H=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_CHIPIDEA=y
+CONFIG_USB_CHIPIDEA_UDC=y
+CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_ULPI_BUS=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_PCI=y
+CONFIG_USB_AUTOSUSPEND_DELAY=2
+CONFIG_TYPEC=y
+CONFIG_TYPEC_TCPM=y
+CONFIG_TYPEC_TCPCI=y
+CONFIG_USB_HID=y
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_COMMON=y
+CONFIG_EXPORTFS_BLOCK_OPS=y
+CONFIG_XILINX_AXI_EMAC=y
+CONFIG_ETHERNET=y
+CONFIG_NET_VENDOR_XILINX=y
+CONFIG_COMMON_CLK_ZYNQMP=y
+# CONFIG_USB_DWC3_OTG is not set
+CONFIG_USB_DWC3_OMAP=y
+CONFIG_USB_DWC3_EXYNOS=y
+CONFIG_USB_DWC3_HAPS=y
+CONFIG_USB_DWC3_KEYSTONE=y
+CONFIG_USB_DWC3_MESON_G12A=y
+CONFIG_USB_DWC3_OF_SIMPLE=y
+CONFIG_USB_DWC3_ST=y
+CONFIG_USB_XHCI_PLATFORM=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+CONFIG_USB_EHCI_TT_NEWSCHED=y
+CONFIG_USB_PHY=y
+CONFIG_USB_LIBCOMPOSITE=y
+CONFIG_USB_F_ACM=m
+CONFIG_USB_U_SERIAL=m
+CONFIG_USB_U_ETHER=y
+CONFIG_USB_F_SERIAL=m
+CONFIG_USB_F_OBEX=m
+CONFIG_USB_F_ECM=m
+CONFIG_USB_F_EEM=y
+CONFIG_USB_F_SUBSET=m
+CONFIG_USB_F_RNDIS=m
+CONFIG_USB_F_MASS_STORAGE=y
+CONFIG_USB_F_FS=m
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_FUNCTIONFS=m
+CONFIG_USB_FUNCTIONFS_GENERIC=y
+CONFIG_USB_DWC3_QCOM=y
+CONFIG_USB_CHIPIDEA_PCI=y
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
+CONFIG_PHY_XILINX_ZYNQMP=y
+CONFIG_NOP_USB_XCEIV=y
+CONFIG_INFINIBAND=y
+CONFIG_INFINIBAND_USER_MAD=y
+CONFIG_INFINIBAND_USER_ACCESS=y
+CONFIG_INFINIBAND_USER_MEM=y
+CONFIG_INFINIBAND_ON_DEMAND_PAGING=y
+CONFIG_INFINIBAND_ADDR_TRANS=y
+CONFIG_INFINIBAND_ADDR_TRANS_CONFIGFS=y
+CONFIG_MFD_DA9062=y
+CONFIG_NVMEM=y
+CONFIG_NVMEM_SYSFS=y
+CONFIG_EDAC_XILINX_DDR=y
+CONFIG_EDAC_DEBUG=y
+# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
+CONFIG_USB_ROLE_SWITCH=y
+CONFIG_TYPEC_FUSB302=y
+CONFIG_USB=y
+CONFIG_USB_OTG=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_OTG_FSM=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_UAS=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_GADGET_XILINX=y
+CONFIG_USB_CONFIGFS=y
+CONFIG_USB_CONFIGFS_EEM=y
+CONFIG_USB_CONFIGFS_MASS_STORAGE=y
+CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_G_SERIAL=m
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_R8169=y
+CONFIG_NET_VENDOR_REALTEK=y
+CONFIG_NET_VENDOR_QUALCOMM=y
+CONFIG_NET_VENDOR_ATHEROS=y
+CONFIG_MICROSEMI_PHY=y
+CONFIG_UIO_XILINX_AI_ENGINE=y
+CONFIG_SRAM=y
+CONFIG_I2C_MUX_PCA9541=y
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_INPUT_MOUSE=y
+CONFIG_REGULATOR_DA9062=y
+# CONFIG_DA9062_WATCHDOG is not set
+CONFIG_NVME_CORE=y
+CONFIG_IPV6=y
+CONFIG_IPV6_SIT=y
+CONFIG_IPV6_NDISC_NODETYPE=y
+CONFIG_64BIT=y
+CONFIG_MMU=y
+CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
+CONFIG_ARCH_HAS_PTE_DEVMAP=y
+CONFIG_ARM64_VA_BITS_48=y
+CONFIG_KEXEC=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_NETFILTER_XT_CONNMARK=y
+CONFIG_PCIE_XILINX=y
+CONFIG_PCIE_XDMA_PL=y
+CONFIG_MEDIA_CAMERA_SUPPORT=y
+CONFIG_MEDIA_CONTROLLER=y
+CONFIG_VIDEO_V4L2_SUBDEV_API=y
+CONFIG_VIDEO_XILINX_DPRXSS=y
+CONFIG_DRM_XLNX_DPTX=y
+CONFIG_XILINX_PS_PCIE_DMA=y
+CONFIG_NF_CONNTRACK_FTP=y
+CONFIG_NF_CONNTRACK_SNMP=y
+CONFIG_NF_CONNTRACK_TFTP=y
+CONFIG_DP83848_PHY=y
+CONFIG_GENERIC_PHY=y
+CONFIG_XILINX_APF=y
+CONFIG_XILINX_DMA_APF=y
+CONFIG_BLK_DEV_NVME=y
+CONFIG_ZONE_DEVICE=y
+CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE=y
+CONFIG_SPARSEMEM_VMEMMAP=y
+CONFIG_SPARSEMEM=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+CONFIG_MIGRATION=y
+CONFIG_XILINX_TRAFGEN=y
+CONFIG_XILINX_AIE=y
+CONFIG_MFD_DA9063=y
+CONFIG_RTC_DRV_DA9063=y
+CONFIG_CRASH_DUMP=y
+CONFIG_USB_CONFIGFS_F_FS=y
+CONFIG_CPU_IDLE=y
+CONFIG_ARM_CPUIDLE=y
+CONFIG_SND_SOC_HDMI_CODEC=y
+CONFIG_XILINX_ZYNQMP_DMA=y
+# CONFIG_XILINX_DMA is not set
+CONFIG_USB_DWC3_DUAL_ROLE=y
+CONFIG_FPGA_BRIDGE=y
+CONFIG_SMP=y
+CONFIG_MEMORY_HOTREMOVE=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_SPI_SPIDEV=y
diff -uNr linux-5.12.10-xilinx/arch/arm64/Kconfig.platforms linux-5.12.10-iwaveg35m/arch/arm64/Kconfig.platforms
--- linux-5.12.10-xilinx/arch/arm64/Kconfig.platforms 2021-06-10 11:41:49.000000000 +0000
+++ linux-5.12.10-iwaveg35m/arch/arm64/Kconfig.platforms 2025-01-26 04:19:56.069592609 +0000
@@ -331,4 +331,11 @@
help
This enables support for Xilinx ZynqMP Family
+config ZYNQMP_IWG35M_H
+ bool "Enable Support for iWave IWG35M"
+ depends on ARCH_ZYNQMP
+ default y
+ help
+ This enables support for the iWave's IWG35M Platform. If you don't know what to do here, say N
+
endmenu
diff -uNr linux-5.12.10-xilinx/drivers/gpu/drm/drm_atomic_helper.c linux-5.12.10-iwaveg35m/drivers/gpu/drm/drm_atomic_helper.c
--- linux-5.12.10-xilinx/drivers/gpu/drm/drm_atomic_helper.c 2021-06-10 11:41:49.000000000 +0000
+++ linux-5.12.10-iwaveg35m/drivers/gpu/drm/drm_atomic_helper.c 2025-01-26 04:19:56.073592690 +0000
@@ -1509,8 +1509,8 @@
drm_crtc_vblank_count(crtc),
msecs_to_jiffies(100));
- WARN(!ret, "[CRTC:%d:%s] vblank wait timed out\n",
- crtc->base.id, crtc->name);
+// WARN(!ret, "[CRTC:%d:%s] vblank wait timed out\n",
+// crtc->base.id, crtc->name);
drm_crtc_vblank_put(crtc);
}
diff -uNr linux-5.12.10-xilinx/drivers/infiniband/core/device.c linux-5.12.10-iwaveg35m/drivers/infiniband/core/device.c
--- linux-5.12.10-xilinx/drivers/infiniband/core/device.c 2021-06-10 11:41:49.000000000 +0000
+++ linux-5.12.10-iwaveg35m/drivers/infiniband/core/device.c 2025-01-26 04:19:56.077592772 +0000
@@ -2695,6 +2695,7 @@
SET_DEVICE_OP(dev_ops, read_counters);
SET_DEVICE_OP(dev_ops, reg_dm_mr);
SET_DEVICE_OP(dev_ops, reg_user_mr);
+ SET_DEVICE_OP(dev_ops, reg_user_mr_ex);
SET_DEVICE_OP(dev_ops, reg_user_mr_dmabuf);
SET_DEVICE_OP(dev_ops, req_ncomp_notif);
SET_DEVICE_OP(dev_ops, req_notify_cq);
diff -uNr linux-5.12.10-xilinx/drivers/infiniband/core/rdma_core.c linux-5.12.10-iwaveg35m/drivers/infiniband/core/rdma_core.c
--- linux-5.12.10-xilinx/drivers/infiniband/core/rdma_core.c 2021-06-10 11:41:49.000000000 +0000
+++ linux-5.12.10-iwaveg35m/drivers/infiniband/core/rdma_core.c 2025-01-26 04:19:56.077592772 +0000
@@ -899,7 +899,9 @@
* if we hit this WARN_ON, that means we are
* racing with a lookup_get.
*/
+#if 0
WARN_ON(uverbs_try_lock_object(obj, UVERBS_LOOKUP_WRITE));
+#endif
if (reason == RDMA_REMOVE_DRIVER_FAILURE)
obj->object = NULL;
if (!uverbs_destroy_uobject(obj, reason, &attrs))
diff -uNr linux-5.12.10-xilinx/drivers/infiniband/core/uverbs_cmd.c linux-5.12.10-iwaveg35m/drivers/infiniband/core/uverbs_cmd.c
--- linux-5.12.10-xilinx/drivers/infiniband/core/uverbs_cmd.c 2021-06-10 11:41:49.000000000 +0000
+++ linux-5.12.10-iwaveg35m/drivers/infiniband/core/uverbs_cmd.c 2025-01-26 04:19:56.081592853 +0000
@@ -692,6 +692,83 @@
return 0;
}
+static int ib_uverbs_reg_mr_ex(struct uverbs_attr_bundle *attrs)
+{
+ struct ib_uverbs_reg_mr_resp resp = {};
+ struct ib_uverbs_reg_mr cmd;
+ struct ib_uobject *uobj;
+ struct ib_pd *pd;
+ struct ib_mr *mr;
+ int ret;
+ struct ib_device *ib_dev;
+
+ ret = uverbs_request(attrs, &cmd, sizeof(cmd));
+ if (ret)
+ return ret;
+
+ if ((cmd.start & ~PAGE_MASK) != (cmd.hca_va & ~PAGE_MASK))
+ return -EINVAL;
+
+ ret = ib_check_mr_access(ib_dev, cmd.access_flags);
+ if (ret)
+ return ret;
+
+ uobj = uobj_alloc(UVERBS_OBJECT_MR, attrs, &ib_dev);
+ if (IS_ERR(uobj))
+ return PTR_ERR(uobj);
+
+ pd = uobj_get_obj_read(pd, UVERBS_OBJECT_PD, cmd.pd_handle, attrs);
+ if (!pd) {
+ ret = -EINVAL;
+ goto err_free;
+ }
+
+ if (cmd.access_flags & IB_ACCESS_ON_DEMAND) {
+ if (!(pd->device->attrs.device_cap_flags &
+ IB_DEVICE_ON_DEMAND_PAGING)) {
+ pr_debug("ODP support not available\n");
+ ret = -EINVAL;
+ goto err_put;
+ }
+ }
+
+ mr = pd->device->ops.reg_user_mr_ex(pd, cmd.start, cmd.length, cmd.hca_va,
+ cmd.access_flags,
+ &attrs->driver_udata);
+ if (IS_ERR(mr)) {
+ ret = PTR_ERR(mr);
+ goto err_put;
+ }
+
+ mr->device = pd->device;
+ mr->pd = pd;
+ mr->type = IB_MR_TYPE_USER;
+ mr->dm = NULL;
+ mr->sig_attrs = NULL;
+ mr->uobject = uobj;
+ atomic_inc(&pd->usecnt);
+ mr->iova = cmd.hca_va;
+
+ rdma_restrack_new(&mr->res, RDMA_RESTRACK_MR);
+ rdma_restrack_set_name(&mr->res, NULL);
+ rdma_restrack_add(&mr->res);
+
+ uobj->object = mr;
+ uobj_put_obj_read(pd);
+ uobj_finalize_uobj_create(uobj, attrs);
+
+ resp.lkey = mr->lkey;
+ resp.rkey = mr->rkey;
+ resp.mr_handle = uobj->id;
+ return uverbs_response(attrs, &resp, sizeof(resp));
+
+err_put:
+ uobj_put_obj_read(pd);
+err_free:
+ uobj_alloc_abort(uobj, attrs);
+ return ret;
+}
+
static int ib_uverbs_reg_mr(struct uverbs_attr_bundle *attrs)
{
struct ib_uverbs_reg_mr_resp resp = {};
@@ -3847,6 +3924,12 @@
struct ib_uverbs_reg_mr_resp),
UAPI_DEF_METHOD_NEEDS_FN(reg_user_mr)),
DECLARE_UVERBS_WRITE(
+ IB_USER_VERBS_CMD_REG_MR_EX,
+ ib_uverbs_reg_mr_ex,
+ UAPI_DEF_WRITE_UDATA_IO(struct ib_uverbs_reg_mr,
+ struct ib_uverbs_reg_mr_resp),
+ UAPI_DEF_METHOD_NEEDS_FN(reg_user_mr_ex)),
+ DECLARE_UVERBS_WRITE(
IB_USER_VERBS_CMD_REREG_MR,
ib_uverbs_rereg_mr,
UAPI_DEF_WRITE_UDATA_IO(struct ib_uverbs_rereg_mr,
diff -uNr linux-5.12.10-xilinx/drivers/mfd/da9062-core.c linux-5.12.10-iwaveg35m/drivers/mfd/da9062-core.c
--- linux-5.12.10-xilinx/drivers/mfd/da9062-core.c 2021-06-10 11:41:49.000000000 +0000
+++ linux-5.12.10-iwaveg35m/drivers/mfd/da9062-core.c 2025-01-26 04:20:30.342291417 +0000
@@ -24,6 +24,17 @@
#define DA9062_IRQ_LOW 0
#define DA9062_IRQ_HIGH 1
+#ifndef CONFIG_ZYNQMP_IWG35M_H
+#define CONFIG_ZYNQMP_IWG35M_H
+#endif
+
+#ifdef CONFIG_ZYNQMP_IWG35M_H
+#include <linux/of_gpio.h>
+#include <linux/gpio.h>
+
+void iwg35m_zynqmp_board_info(struct da9062 *chip);
+#endif
+
static struct regmap_irq da9061_irqs[] = {
/* EVENT A */
[DA9061_IRQ_ONKEY] = {
@@ -321,6 +332,7 @@
return ret;
}
+#ifndef CONFIG_ZYNQMP_IWG35M_H
static int da9062_get_device_type(struct da9062 *chip)
{
int device_id, variant_id, variant_mrc, variant_vrc;
@@ -371,6 +383,7 @@
return ret;
}
+#endif
static u32 da9062_configure_irq_type(struct da9062 *chip, int irq, u32 *trigger)
{
@@ -618,6 +631,41 @@
};
MODULE_DEVICE_TABLE(of, da9062_dt_ids);
+/* IWG35M: Function to print the Board configuration number using PMIC register and PL GPIOs */
+#ifdef CONFIG_ZYNQMP_IWG35M_H
+void iwg35m_zynqmp_board_info(struct da9062 *chip)
+{
+ int pcb_rev=1, bom_rev_msb=0, bom_rev_lsb=0 , ay17, bom_rev_gpio, bom_rev_gpio_val, pmic_st, i;
+ struct device_node *node;
+ char pl_gpios[4][8] = {"pl-aw17", "pl-bb16", "pl-ba16", "pl-ba17"};
+
+ /* IWG35M: Read the PMIC STATUS_B register*/
+ pmic_st = regmap_read(chip->regmap, DA9062AA_STATUS_B, &pcb_rev);
+ pcb_rev &= 0x3;
+ pcb_rev += 1;
+
+ node = of_find_node_by_name(NULL,"bom_rev");
+ if(node){
+ /* IWG35M: Read the AY17 GPIO from the dts file*/
+ ay17 = of_get_named_gpio(node, "pl-ay17", 0);
+ if (gpio_is_valid(ay17)){
+ gpio_request(ay17, "pl-io-ay17");
+ bom_rev_msb = gpio_get_value(ay17);
+ }
+
+ /* IWG35M: Read the other 4 PL GPIOs from the dts file*/
+ for(i=0; i<4; i++){
+ bom_rev_gpio = of_get_named_gpio(node, pl_gpios[i], 0);
+ if (gpio_is_valid(bom_rev_gpio)){
+ gpio_request(bom_rev_gpio, pl_gpios[i]);
+ bom_rev_gpio_val = gpio_get_value(bom_rev_gpio);
+ bom_rev_lsb |= (bom_rev_gpio_val << i);
+ }
+ }
+ }
+}
+#endif
+
static int da9062_i2c_probe(struct i2c_client *i2c,
const struct i2c_device_id *id)
{
@@ -683,9 +731,12 @@
if (ret < 0)
dev_warn(chip->dev, "Cannot clear fault log\n");
+/* IWG35M: RTC: Disable device id read to avoid RTC driver probe issue with Device-id mismatch*/
+#ifndef CONFIG_ZYNQMP_IWG35M_H
ret = da9062_get_device_type(chip);
if (ret)
return ret;
+#endif
ret = da9062_configure_irq_type(chip, i2c->irq, &trigger_type);
if (ret < 0) {
@@ -712,7 +763,10 @@
regmap_del_irq_chip(i2c->irq, chip->regmap_irq);
return ret;
}
-
+#ifdef CONFIG_ZYNQMP_IWG35M_H
+ /*IWG35M: print the BSP and SOM version*/
+ iwg35m_zynqmp_board_info(chip);
+#endif
return ret;
}
diff -uNr linux-5.12.10-xilinx/drivers/net/can/xilinx_can.c linux-5.12.10-iwaveg35m/drivers/net/can/xilinx_can.c
--- linux-5.12.10-xilinx/drivers/net/can/xilinx_can.c 2025-01-26 04:22:12.924382014 +0000
+++ linux-5.12.10-iwaveg35m/drivers/net/can/xilinx_can.c 2025-01-26 04:19:56.085592935 +0000
@@ -28,6 +28,9 @@
#include <linux/can/error.h>
#include <linux/can/led.h>
#include <linux/pm_runtime.h>
+#include <linux/of_device.h>
+#include <linux/gpio.h>
+#include <linux/of_gpio.h>
#define DRIVER_NAME "xilinx_can"
@@ -1693,6 +1696,7 @@
int rx_max, tx_max;
u32 hw_tx_max = 0, hw_rx_max = 0;
const char *hw_tx_max_property;
+ int pwr_gpio;
/* Get the virtual base address for the device */
addr = devm_platform_ioremap_resource(pdev, 0);
@@ -1724,6 +1728,13 @@
goto err;
}
+ /* IWG35M: CAN: Enable CAN power down gpio */
+ pwr_gpio = of_get_named_gpio(pdev->dev.of_node, "pwdn-gpio", 0);
+ if (gpio_is_valid(pwr_gpio) &&
+ !gpio_request_one(pwr_gpio, GPIOF_DIR_OUT, "can-powerdown")) {
+ gpio_set_value(pwr_gpio, 0);
+ }
+
/* With TX FIFO:
*
* There is no way to directly figure out how many frames have been
diff -uNr linux-5.12.10-xilinx/drivers/net/ethernet/cadence/macb_main.c linux-5.12.10-iwaveg35m/drivers/net/ethernet/cadence/macb_main.c
--- linux-5.12.10-xilinx/drivers/net/ethernet/cadence/macb_main.c 2021-06-10 11:41:49.000000000 +0000
+++ linux-5.12.10-iwaveg35m/drivers/net/ethernet/cadence/macb_main.c 2025-01-26 04:19:56.085592935 +0000
@@ -3683,6 +3683,41 @@
dev_dbg(&bp->pdev->dev, "Cadence caps 0x%08x\n", bp->caps);
}
+#if defined(CONFIG_OF)
+static void macb_reset_phy(struct platform_device *pdev)
+{
+ int err, phy_reset, msec = 1;
+ bool active_low;
+ struct device_node *np = pdev->dev.of_node;
+
+ if (!np)
+ return;
+
+ of_property_read_u32(np, "phy-reset-duration", &msec);
+ active_low = of_property_read_bool(np, "phy-reset-active-low");
+
+ phy_reset = of_get_named_gpio(np, "phy-reset-gpio", 0);
+ if (!gpio_is_valid(phy_reset))
+ return;
+
+ err = devm_gpio_request_one(&pdev->dev, phy_reset,
+ active_low ? GPIOF_OUT_INIT_LOW :
+ GPIOF_OUT_INIT_HIGH, "phy-reset");
+ if (err) {
+ dev_err(&pdev->dev, "failed to get phy-reset-gpio: %d\n", err);
+ return;
+ }
+ msleep(msec);
+ gpio_set_value(phy_reset, active_low);
+ /*IWG35M: Ethernet: Added delay to wait till the device comes out of reset*/
+ msleep(msec);
+}
+#else /* CONFIG_OF */
+static void macb_reset_phy(struct platform_device *pdev)
+{
+}
+#endif /* CONFIG_OF */
+
static void macb_probe_queues(void __iomem *mem,
bool native_io,
unsigned int *queue_mask,
@@ -4752,6 +4787,7 @@
bp->phy_interface = PHY_INTERFACE_MODE_MII;
else
bp->phy_interface = interface;
+ macb_reset_phy(pdev);
/* IP specific init */
err = init(pdev);
diff -uNr linux-5.12.10-xilinx/drivers/usb/core/hub.c linux-5.12.10-iwaveg35m/drivers/usb/core/hub.c
--- linux-5.12.10-xilinx/drivers/usb/core/hub.c 2021-06-10 11:41:49.000000000 +0000
+++ linux-5.12.10-iwaveg35m/drivers/usb/core/hub.c 2025-01-26 04:19:56.097593180 +0000
@@ -30,6 +30,9 @@
#include <linux/random.h>
#include <linux/pm_qos.h>
#include <linux/kobject.h>
+#include <linux/of_device.h>
+#include <linux/of_gpio.h>
+#include <linux/gpio.h>
#include <linux/uaccess.h>
#include <asm/byteorder.h>
@@ -2191,6 +2194,23 @@
struct usb_device *udev = *pdev;
struct usb_hub *hub = NULL;
int port1 = 1;
+ struct device_node *np;
+ static int usb_power_en;
+
+ /*IWG35M : USB: Configure USB3.0 Power Enable GPIO and set it to 0*/
+ np = of_find_compatible_node(NULL, NULL, "fcs,fusb302");
+ if (!np) {
+ pr_warn("failed to find fcs,fusb302 node\n");
+ goto put_node;
+ }
+
+ usb_power_en = of_get_named_gpio(np, "fcs,power_en", 0);
+ if (gpio_is_valid(usb_power_en))
+ /*IWG35M :: Set the USB Power Enable GPIO to 0 and free GPIO*/
+ gpio_set_value(usb_power_en,0);
+
+put_node:
+ of_node_put(np);
/* mark the device as inactive, so any further urb submissions for
* this device (and any of its children) will fail immediately.
diff -uNr linux-5.12.10-xilinx/drivers/usb/typec/tcpm/fusb302.c linux-5.12.10-iwaveg35m/drivers/usb/typec/tcpm/fusb302.c
--- linux-5.12.10-xilinx/drivers/usb/typec/tcpm/fusb302.c 2021-06-10 11:41:49.000000000 +0000
+++ linux-5.12.10-iwaveg35m/drivers/usb/typec/tcpm/fusb302.c 2025-01-26 04:19:56.097593180 +0000
@@ -16,6 +16,8 @@
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/of_device.h>
+#include <linux/gpio.h>
+#include <linux/of_gpio.h>
#include <linux/pinctrl/consumer.h>
#include <linux/proc_fs.h>
#include <linux/regulator/consumer.h>
@@ -42,6 +44,8 @@
*/
#define T_BC_LVL_DEBOUNCE_DELAY_MS 30
+static int fcs_cc, usb_power_en;
+
enum toggling_mode {
TOGGLING_MODE_OFF,
TOGGLING_MODE_DRP,
@@ -902,6 +906,13 @@
}
fusb302_log(chip, "pd header := %s, %s", typec_role_name[pwr],
typec_data_role_name[data]);
+ /*IWG35M :: Configure USB3.0 Power Enable GPIO and set it to 0*/
+ if (pwr == TYPEC_SINK)
+ gpio_set_value(usb_power_en, 0);
+
+ else if (pwr == TYPEC_SOURCE)
+ gpio_set_value(usb_power_en, 1);
+
done:
mutex_unlock(&chip->lock);
@@ -1187,6 +1198,7 @@
cc_polarity = (togdone_result == FUSB_REG_STATUS1A_TOGSS_SNK1) ?
TYPEC_POLARITY_CC1 : TYPEC_POLARITY_CC2;
ret = fusb302_set_cc_polarity_and_pull(chip, cc_polarity, false, true);
+ gpio_set_value(fcs_cc, (strcmp(cc_polarity_name[cc_polarity],"Polarity_CC1") == 0) ? 0 : 1);
if (ret < 0) {
fusb302_log(chip, "cannot set cc polarity %s, ret=%d",
cc_polarity_name[cc_polarity], ret);
@@ -1347,6 +1359,7 @@
}
/* set polarity and pull_up, pull_down */
ret = fusb302_set_cc_polarity_and_pull(chip, cc_polarity, true, false);
+ gpio_set_value(fcs_cc, (strcmp(cc_polarity_name[cc_polarity],"Polarity_CC1") == 0) ? 0 : 1);
if (ret < 0) {
fusb302_log(chip, "cannot set cc polarity %s, ret=%d",
cc_polarity_name[cc_polarity], ret);
@@ -1639,6 +1652,16 @@
return ret;
}
chip->gpio_int_n_irq = ret;
+
+ /*IWG35M :: GPIO configured for Switch selection*/
+ fcs_cc = of_get_named_gpio(dev->of_node, "fcs,cc", 0);
+ if (gpio_is_valid(fcs_cc))
+ gpio_request_one(fcs_cc, GPIOF_DIR_OUT, "usb-fcs-cc");
+
+ usb_power_en = of_get_named_gpio(dev->of_node, "fcs,power_en", 0);
+ if (gpio_is_valid(usb_power_en))
+ gpio_request_one(usb_power_en, GPIOF_DIR_OUT, "usb-power-en");
+
return 0;
}
diff -uNr linux-5.12.10-xilinx/include/rdma/ib_verbs.h linux-5.12.10-iwaveg35m/include/rdma/ib_verbs.h
--- linux-5.12.10-xilinx/include/rdma/ib_verbs.h 2021-06-10 11:41:49.000000000 +0000
+++ linux-5.12.10-iwaveg35m/include/rdma/ib_verbs.h 2025-01-26 04:19:56.101593261 +0000
@@ -43,6 +43,8 @@
#include <uapi/rdma/rdma_user_ioctl.h>
#include <uapi/rdma/ib_user_ioctl_verbs.h>
+#define IB_CHANGES_XIB_NVMF
+
#define IB_FW_VERSION_NAME_MAX ETHTOOL_FWVERS_LEN
struct ib_umem_odp;
@@ -1237,6 +1239,11 @@
IB_QP_RATE_LIMIT = (1<<25),
IB_QP_ATTR_STANDARD_BITS = GENMASK(20, 0),
+#ifdef IB_CHANGES_XIB_NVMF
+ IB_QP_RST_RQ = (1<<26),
+ IB_QP_RST_SQ_CQ = (1<<27),
+ IB_ENABLE_QP_HW_ACCL = (1<<28),
+#endif
};
enum ib_qp_state {
@@ -1288,6 +1295,15 @@
u8 alt_timeout;
u32 rate_limit;
struct net_device *xmit_slave;
+#ifdef IB_CHANGES_XIB_NVMF
+ union {
+ int nvmf_rhost;
+ /* Rx packets to be processed */
+ int rx_pkt_pending;
+ };
+ dma_addr_t rq_ba_p;
+ dma_addr_t sq_ba_p;
+#endif
};
enum ib_wr_opcode {
@@ -2434,6 +2450,9 @@
struct ib_mr *(*reg_user_mr)(struct ib_pd *pd, u64 start, u64 length,
u64 virt_addr, int mr_access_flags,
struct ib_udata *udata);
+ struct ib_mr *(*reg_user_mr_ex)(struct ib_pd *pd, u64 start, u64 length,
+ u64 virt_addr, int mr_access_flags,
+ struct ib_udata *udata);
struct ib_mr *(*reg_user_mr_dmabuf)(struct ib_pd *pd, u64 offset,
u64 length, u64 virt_addr, int fd,
int mr_access_flags,
diff -uNr linux-5.12.10-xilinx/include/uapi/rdma/ib_user_ioctl_verbs.h linux-5.12.10-iwaveg35m/include/uapi/rdma/ib_user_ioctl_verbs.h
--- linux-5.12.10-xilinx/include/uapi/rdma/ib_user_ioctl_verbs.h 2021-06-10 11:41:49.000000000 +0000
+++ linux-5.12.10-iwaveg35m/include/uapi/rdma/ib_user_ioctl_verbs.h 2025-01-26 04:19:56.105593343 +0000
@@ -249,6 +249,7 @@
RDMA_DRIVER_QIB,
RDMA_DRIVER_EFA,
RDMA_DRIVER_SIW,
+ RDMA_DRIVER_XLNX,
};
enum ib_uverbs_gid_type {
diff -uNr linux-5.12.10-xilinx/include/uapi/rdma/ib_user_verbs.h linux-5.12.10-iwaveg35m/include/uapi/rdma/ib_user_verbs.h
--- linux-5.12.10-xilinx/include/uapi/rdma/ib_user_verbs.h 2021-06-10 11:41:49.000000000 +0000
+++ linux-5.12.10-iwaveg35m/include/uapi/rdma/ib_user_verbs.h 2025-01-26 04:19:56.105593343 +0000
@@ -87,6 +87,7 @@
IB_USER_VERBS_CMD_OPEN_XRCD,
IB_USER_VERBS_CMD_CLOSE_XRCD,
IB_USER_VERBS_CMD_CREATE_XSRQ,
+ IB_USER_VERBS_CMD_REG_MR_EX,
IB_USER_VERBS_CMD_OPEN_QP,
};
diff -uNr linux-5.12.10-xilinx/include/uapi/rdma/xib-abi.h linux-5.12.10-iwaveg35m/include/uapi/rdma/xib-abi.h
--- linux-5.12.10-xilinx/include/uapi/rdma/xib-abi.h 1970-01-01 00:00:00.000000000 +0000
+++ linux-5.12.10-iwaveg35m/include/uapi/rdma/xib-abi.h 2025-01-26 04:19:56.109593424 +0000
@@ -0,0 +1,75 @@
+/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) */
+/*
+ * Copyright (c) 2018 Xilinx Inc.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses. You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * OpenIB.org BSD license below:
+ *
+ * Redistribution and use in source and binary forms, with or
+ * without modification, are permitted provided that the following
+ * conditions are met:
+ *
+ * - Redistributions of source code must retain the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer.
+ *
+ * - Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials
+ * provided with the distribution.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef XIB_ABI_USER_H
+#define XIB_ABI_USER_H
+
+#include <linux/types.h>
+
+struct xib_ib_create_cq {
+ __aligned_u64 buf_addr;
+ __aligned_u64 db_addr;
+};
+
+struct xib_ib_create_qp {
+ __aligned_u64 db_addr;
+ __aligned_u64 sq_ba;
+ __aligned_u64 rq_ba;
+ __aligned_u64 cq_ba;
+ __aligned_u64 imm_inv_ba;
+};
+
+struct xib_ib_alloc_pd_resp {
+ __u32 pdn;
+};
+
+struct xib_ib_create_cq_resp {
+ __aligned_u64 cqn;
+ __aligned_u64 cap_flags;
+};
+
+struct xib_ib_create_qp_resp {
+ __u32 qpn;
+ __u32 cap_flags;
+};
+
+struct xib_ib_alloc_ucontext_resp {
+ __aligned_u64 db_pa;
+ __u32 db_size;
+ __aligned_u64 cq_ci_db_pa;
+ __aligned_u64 rq_pi_db_pa;
+ uint32_t cq_ci_db_size, rq_pi_db_size;
+ __u32 qp_tab_size;
+};
+
+#endif /* XIB_ABI_USER_H */
diff -uNr linux-5.12.10-xilinx/mm/Kconfig linux-5.12.10-iwaveg35m/mm/Kconfig
--- linux-5.12.10-xilinx/mm/Kconfig 2021-06-10 11:41:49.000000000 +0000
+++ linux-5.12.10-iwaveg35m/mm/Kconfig 2025-01-26 04:19:56.109593424 +0000
@@ -280,6 +280,9 @@
config PHYS_ADDR_T_64BIT
def_bool 64BIT
+config ARCH_MEMORY_PROBE
+ def_bool y
+ depends on MEMORY_HOTPLUG
config BOUNCE
bool "Enable bounce buffers"
default y
diff -uNr linux-5.12.10-xilinx/sound/soc/soc-dai.c linux-5.12.10-iwaveg35m/sound/soc/soc-dai.c
--- linux-5.12.10-xilinx/sound/soc/soc-dai.c 2021-06-10 11:41:49.000000000 +0000
+++ linux-5.12.10-iwaveg35m/sound/soc/soc-dai.c 2025-01-26 04:19:56.109593424 +0000
@@ -24,9 +24,12 @@
case -ENOTSUPP:
break;
default:
+#if 0
dev_err(dai->dev,
"ASoC: error at %s on %s: %d\n",
func, dai->name, ret);
+#endif
+ break;
}
return ret;
diff -uNr linux-5.12.10-xilinx/sound/soc/xilinx/xlnx_formatter_pcm.c linux-5.12.10-iwaveg35m/sound/soc/xilinx/xlnx_formatter_pcm.c
--- linux-5.12.10-xilinx/sound/soc/xilinx/xlnx_formatter_pcm.c 2025-01-26 04:22:13.220388045 +0000
+++ linux-5.12.10-iwaveg35m/sound/soc/xilinx/xlnx_formatter_pcm.c 2025-01-26 04:19:56.113593506 +0000
@@ -389,11 +389,12 @@
stream_data->xfer_mode = (val & data_xfer_mode) >> data_xfer_shift;
stream_data->ch_limit = (val & ch_count_mask) >> ch_count_shift;
+#if 0
dev_info(component->dev,
"stream %d : format = %d mode = %d ch_limit = %d\n",
substream->stream, stream_data->interleaved,
stream_data->xfer_mode, stream_data->ch_limit);
-
+#endif
snd_soc_set_runtime_hwparams(substream, &xlnx_pcm_hardware);
runtime->private_data = stream_data;
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