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Commit babf6e99 authored by Vladimir Bashkirtsev's avatar Vladimir Bashkirtsev
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Fixed DRAM init for Orange Pi 3 LTS

parent 0b099335
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Showing with 16 additions and 2 deletions
u-boot-2021.04-orangepi-3-lts.patch
View file @ babf6e99
diff -uNr u-boot-2021.04/arch/arm/dts/Makefile u-boot-2021.04-orangepi-3-lts/arch/arm/dts/Makefile diff -uNr u-boot-2021.04/arch/arm/dts/Makefile u-boot-2021.04-orangepi-3-lts/arch/arm/dts/Makefile
--- u-boot-2021.04/arch/arm/dts/Makefile 2021-04-05 15:03:29.000000000 +0000 --- u-boot-2021.04/arch/arm/dts/Makefile 2021-04-05 15:03:29.000000000 +0000
+++ u-boot-2021.04-orangepi-3-lts/arch/arm/dts/Makefile 2022-11-19 05:29:39.041585689 +0000 +++ u-boot-2021.04-orangepi-3-lts/arch/arm/dts/Makefile 2023-09-05 13:09:53.319031818 +0000
@@ -613,6 +613,7 @@ @@ -613,6 +613,7 @@
dtb-$(CONFIG_MACH_SUN50I_H6) += \ dtb-$(CONFIG_MACH_SUN50I_H6) += \
sun50i-h6-beelink-gs1.dtb \ sun50i-h6-beelink-gs1.dtb \
...@@ -11,7 +11,7 @@ diff -uNr u-boot-2021.04/arch/arm/dts/Makefile u-boot-2021.04-orangepi-3-lts/arc ...@@ -11,7 +11,7 @@ diff -uNr u-boot-2021.04/arch/arm/dts/Makefile u-boot-2021.04-orangepi-3-lts/arc
sun50i-h6-pine-h64.dtb \ sun50i-h6-pine-h64.dtb \
diff -uNr u-boot-2021.04/arch/arm/dts/sun50i-h6-orangepi-3-lts.dts u-boot-2021.04-orangepi-3-lts/arch/arm/dts/sun50i-h6-orangepi-3-lts.dts diff -uNr u-boot-2021.04/arch/arm/dts/sun50i-h6-orangepi-3-lts.dts u-boot-2021.04-orangepi-3-lts/arch/arm/dts/sun50i-h6-orangepi-3-lts.dts
--- u-boot-2021.04/arch/arm/dts/sun50i-h6-orangepi-3-lts.dts 1970-01-01 00:00:00.000000000 +0000 --- u-boot-2021.04/arch/arm/dts/sun50i-h6-orangepi-3-lts.dts 1970-01-01 00:00:00.000000000 +0000
+++ u-boot-2021.04-orangepi-3-lts/arch/arm/dts/sun50i-h6-orangepi-3-lts.dts 2022-11-19 05:29:39.049585841 +0000 +++ u-boot-2021.04-orangepi-3-lts/arch/arm/dts/sun50i-h6-orangepi-3-lts.dts 2023-09-05 13:09:53.319031818 +0000
@@ -0,0 +1,180 @@ @@ -0,0 +1,180 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT) +// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/* +/*
...@@ -193,6 +193,20 @@ diff -uNr u-boot-2021.04/arch/arm/dts/sun50i-h6-orangepi-3-lts.dts u-boot-2021.0 ...@@ -193,6 +193,20 @@ diff -uNr u-boot-2021.04/arch/arm/dts/sun50i-h6-orangepi-3-lts.dts u-boot-2021.0
+ pinctrl-0 = <&uart0_ph_pins>; + pinctrl-0 = <&uart0_ph_pins>;
+ status = "okay"; + status = "okay";
+}; +};
diff -uNr u-boot-2021.04/arch/arm/mach-sunxi/dram_sun50i_h6.c u-boot-2021.04-orangepi-3-lts/arch/arm/mach-sunxi/dram_sun50i_h6.c
--- u-boot-2021.04/arch/arm/mach-sunxi/dram_sun50i_h6.c 2021-04-05 15:03:29.000000000 +0000
+++ u-boot-2021.04-orangepi-3-lts/arch/arm/mach-sunxi/dram_sun50i_h6.c 2023-09-07 13:17:41.680006899 +0000
@@ -667,6 +667,10 @@
(struct sunxi_mctl_com_reg *)SUNXI_DRAM_COM_BASE;
struct dram_para para = {
.clk = CONFIG_DRAM_CLK,
+ .ranks = 2,
+ .cols = 11,
+ .rows = 14,
+ .bus_full_width = 1,
#ifdef CONFIG_SUNXI_DRAM_H6_LPDDR3
.type = SUNXI_DRAM_TYPE_LPDDR3,
.dx_read_delays = SUN50I_H6_LPDDR3_DX_READ_DELAYS,
diff -uNr u-boot-2021.04/configs/orangepi_3_lts_defconfig u-boot-2021.04-orangepi-3-lts/configs/orangepi_3_lts_defconfig diff -uNr u-boot-2021.04/configs/orangepi_3_lts_defconfig u-boot-2021.04-orangepi-3-lts/configs/orangepi_3_lts_defconfig
--- u-boot-2021.04/configs/orangepi_3_lts_defconfig 1970-01-01 00:00:00.000000000 +0000 --- u-boot-2021.04/configs/orangepi_3_lts_defconfig 1970-01-01 00:00:00.000000000 +0000
+++ u-boot-2021.04-orangepi-3-lts/configs/orangepi_3_lts_defconfig 2022-11-19 05:54:09.445660184 +0000 +++ u-boot-2021.04-orangepi-3-lts/configs/orangepi_3_lts_defconfig 2022-11-19 05:54:09.445660184 +0000
......
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