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Commit 05005439 authored by Vladimir Bashkirtsev's avatar Vladimir Bashkirtsev
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Added support for Nile board with Orinoco Mini

parent c1f1bbe7
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Showing with 2055 additions and 3 deletions
Makefile
View file @ 05005439
......@@ -569,7 +569,7 @@ iwaveg35m-mender: iwaveg35m-boot-cmd-mender iwaveg35m-fw_env.config-mender iwave
@echo "# CONFIG_WDT_ASPEED is not set" >> u-boot-2021.04/.config
@echo "# CONFIG_WDT_AST2600 is not set" >> u-boot-2021.04/.config
@echo "# CONFIG_WDT_AT91 is not set" >> u-boot-2021.04/.config
@echo "# CONFIG_WDT_CDNS is not set" >> u-boot-2021.04/.config
@echo "CONFIG_WDT_CDNS=y" >> u-boot-2021.04/.config
@echo "# CONFIG_WDT_CORTINA is not set" >> u-boot-2021.04/.config
@echo "# CONFIG_WDT_ORION is not set" >> u-boot-2021.04/.config
@echo "# CONFIG_WDT_SBSA is not set" >> u-boot-2021.04/.config
......@@ -598,10 +598,10 @@ iwaveg35m-mender: iwaveg35m-boot-cmd-mender iwaveg35m-fw_env.config-mender iwave
iwaveg35m-boot-cmd-mender:
define BOOTCMD_IWAVEG35M_MENDER
run mender_setup
load $${mender_uboot_root} $${kernel_addr_r} boot/zImage
load $${mender_uboot_root} $${kernel_addr_r} boot/Image
load $${mender_uboot_root} $${fdt_addr_r} boot/machine.dtb
setenv bootargs console=ttyPS0,115200 panic=10 panic_on_oops=1 root=$${mender_kernel_root} rootfstype=ext4 ro rootwait quiet loglevel=3 systemd.show_status=1
bootz $${kernel_addr_r} - $${fdt_addr_r}
booti $${kernel_addr_r} - $${fdt_addr_r}
run mender_try_to_recover
endef
export BOOTCMD_IWAVEG35M_MENDER
......@@ -613,6 +613,141 @@ define FW_ENV_IWAVEG35M_MENDER
endef
export FW_ENV_IWAVEG35M_MENDER
nileorinocomini: nileorinocomini-boot-cmd nileorinocomini-fw_env.config nileorinocomini-boot.bif
tar xf xilinx-bootgen-2022.2.tar.gz
$(MAKE) -C xilinx-bootgen-2022.2
$(MAKE) -C ../embeddedsw-xilinx nileorinocomini
tar xf arm-trusted-firmware.tar.xz
$(MAKE) -C arm-trusted-firmware PLAT=zynqmp RESET_TO_BL31=1 bl31
tar xf u-boot-2021.04.tar.gz
patch -Np1 -d u-boot-2021.04 < u-boot-2021.04-nileorinocomini.patch
cp xilinx-bootgen-2022.2/bootgen u-boot-2021.04
cp ../embeddedsw-xilinx/fsbl.elf u-boot-2021.04
cp ../embeddedsw-xilinx/pmufw.elf u-boot-2021.04/pmufw.elf
cp arm-trusted-firmware/build/zynqmp/release/bl31/bl31.elf u-boot-2021.04
$(MAKE) -C u-boot-2021.04 zynqmp_nileorinocomini_defconfig
@echo "# CONFIG_ENV_IS_IN_FAT is not set" >> u-boot-2021.04/.config
@echo "CONFIG_ENV_IS_IN_MMC=y" >> u-boot-2021.04/.config
@echo "# CONFIG_SYS_REDUNDAND_ENVIRONMENT is not set" >> u-boot-2021.04/.config
@echo "CONFIG_ENV_OFFSET=0x88000" >> u-boot-2021.04/.config
$(MAKE) -C u-boot-2021.04 oldconfig
$(MAKE) -C u-boot-2021.04
mkdir /uboot
mkfs -t vfat -n UBOOT /dev/$(DISK)1
sed -i '/\/dev\/root/a \/dev\/disk\/by-label\/UBOOT \/uboot vfat defaults,sync,auto 0 0' /etc/fstab
mount /dev/$(DISK)1 /uboot
@echo "$$BOOTBIF_NILEORINOCOMINI" > u-boot-2021.04/boot.bif
cd u-boot-2021.04 && ./bootgen -arch zynqmp -image boot.bif -o /uboot/BOOT.bin -w on
@echo "$$BOOTCMD_NILEORINOCOMINI" > u-boot-2021.04/boot.cmd
u-boot-2021.04/tools/mkimage -C none -A arm -T script -d u-boot-2021.04/boot.cmd /uboot/boot.scr
$(MAKE) -C u-boot-2021.04 envtools
cp u-boot-2021.04/tools/env/fw_printenv /sbin/fw_printenv
ln -sf /sbin/fw_printenv /sbin/fw_setenv
@echo "$$FW_ENV_NILEORINOCOMINI" > /etc/fw_env.config
/sbin/fw_setenv reset
if [ -n "$(ENV_DEVICE)" ]; then sed -i 's/$(BOOT_DEVICE)/$(ENV_DEVICE)/' /etc/fw_env.config; fi
umount /dev/$(DISK)1
rm -rf u-boot-2021.04
rm -rf arm-trusted-firmware
rm -rf xilinx-bootgen_2022.2
nileorinocomini-boot-cmd:
define BOOTCMD_NILEORINOCOMINI
load mmc 0:2 $${kernel_addr_r} boot/Image
load mmc 0:2 $${fdt_addr_r} boot/machine.dtb
setenv bootargs console=ttyPS0,115200 root=/dev/$(BOOT_DISK)2 rootfstype=ext4 rootflags=discard rw rootwait quiet loglevel=3 systemd.show_status=1
booti $${kernel_addr_r} - $${fdt_addr_r}
endef
export BOOTCMD_NILEORINOCOMINI
nileorinocomini-fw_env.config:
define FW_ENV_NILEORINOCOMINI
/dev/$(BOOT_DEVICE) 0x88000 0x20000
endef
export FW_ENV_NILEORINOCOMINI
nileorinocomini-boot.bif:
define BOOTBIF_NILEORINOCOMINI
the_ROM_image:
{
[bootloader, destination_cpu=a53-0] fsbl.elf
[pmufw_image] pmufw.elf
[destination_cpu=a53-0, exception_level=el-3, trustzone] bl31.elf
[destination_cpu=a53-0, load=0x00100000] u-boot.dtb
[destination_cpu=a53-0, exception_level=el-2] u-boot.elf
}
endef
export BOOTBIF_NILEORINOCOMINI
nileorinocomini-mender: nileorinocomini-boot-cmd-mender nileorinocomini-fw_env.config-mender nileorinocomini-boot.bif
tar xf xilinx-bootgen-2022.2.tar.gz
$(MAKE) -C xilinx-bootgen-2022.2
$(MAKE) -C ../embeddedsw-xilinx nileorinocomini
tar xf arm-trusted-firmware.tar.xz
$(MAKE) -C arm-trusted-firmware PLAT=zynqmp RESET_TO_BL31=1 bl31
tar xf u-boot-2021.04.tar.gz
patch -Np1 -d u-boot-2021.04 < u-boot-2021.04-nileorinocomini.patch
patch -Np1 -d u-boot-2021.04 < u-boot-2021.04-mender.patch
cp xilinx-bootgen-2022.2/bootgen u-boot-2021.04
cp ../embeddedsw-xilinx/fsbl.elf u-boot-2021.04
cp ../embeddedsw-xilinx/pmufw.elf u-boot-2021.04/pmufw.elf
cp arm-trusted-firmware/build/zynqmp/release/bl31/bl31.elf u-boot-2021.04
$(MAKE) -C u-boot-2021.04 zynqmp_nileorinocomini_defconfig
@echo "# CONFIG_ENV_IS_NOWHERE is not set" >> u-boot-2021.04/.config
@echo "# CONFIG_ENV_IS_IN_FAT is not set" >> u-boot-2021.04/.config
@echo "CONFIG_ENV_IS_IN_MMC=y" >> u-boot-2021.04/.config
@echo "CONFIG_SYS_REDUNDAND_ENVIRONMENT=y" >> u-boot-2021.04/.config
@echo "# CONFIG_ENV_OFFSET is not set" >> u-boot-2021.04/.config
@echo "# CONFIG_ENV_OFFSET_REDUND is not set" >> u-boot-2021.04/.config
@echo "CONFIG_WDT=y" >> u-boot-2021.04/.config
@echo "# CONFIG_CMD_WDT is not set" >> u-boot-2021.04/.config
@echo "# CONFIG_WDT_ASPEED is not set" >> u-boot-2021.04/.config
@echo "# CONFIG_WDT_AST2600 is not set" >> u-boot-2021.04/.config
@echo "# CONFIG_WDT_AT91 is not set" >> u-boot-2021.04/.config
@echo "CONFIG_WDT_CDNS=y" >> u-boot-2021.04/.config
@echo "# CONFIG_WDT_CORTINA is not set" >> u-boot-2021.04/.config
@echo "# CONFIG_WDT_ORION is not set" >> u-boot-2021.04/.config
@echo "# CONFIG_WDT_SBSA is not set" >> u-boot-2021.04/.config
@echo "# CONFIG_WDT_SP805 is not set" >> u-boot-2021.04/.config
@echo "# CONFIG_WDT_STM32MP is not set" >> u-boot-2021.04/.config
@echo "# CONFIG_XILINX_TB_WATCHDOG is not set" >> u-boot-2021.04/.config
$(MAKE) -C u-boot-2021.04 oldconfig
$(MAKE) -C u-boot-2021.04
mount /dev/$(DISK)1 /uboot
dd if=/dev/zero of=/dev/$(ROOT_DEVICE) bs=512 seek=1 count=49151
@echo "$$BOOTBIF_NILEORINOCOMINI" > u-boot-2021.04/boot.bif
cd u-boot-2021.04 && ./bootgen -arch zynqmp -image boot.bif -o /uboot/BOOT.bin -w on
@echo "$$BOOTCMD_NILEORINOCOMINI_MENDER" > u-boot-2021.04/boot.cmd
u-boot-2021.04/tools/mkimage -C none -A arm -T script -d u-boot-2021.04/boot.cmd /uboot/boot.scr
$(MAKE) -C u-boot-2021.04 envtools
cp u-boot-2021.04/tools/env/fw_printenv /sbin/fw_printenv
ln -sf /sbin/fw_printenv /sbin/fw_setenv
@echo "$$FW_ENV_NILEORINOCOMINI_MENDER" > /etc/fw_env.config
/sbin/fw_setenv reset
if [ -n "$(ENV_DEVICE)" ]; then sed -i 's/$(BOOT_DEVICE)/$(ENV_DEVICE)/' /etc/fw_env.config; fi
umount /dev/$(DISK)1
rm -rf u-boot-2021.04
rm -rf arm-trusted-firmware
rm -rf xilinx-bootgen_2022.2
nileorinocomini-boot-cmd-mender:
define BOOTCMD_NILEORINOCOMINI_MENDER
run mender_setup
load $${mender_uboot_root} $${kernel_addr_r} boot/Image
load $${mender_uboot_root} $${fdt_addr_r} boot/machine.dtb
setenv bootargs console=ttyPS0,115200 panic=10 panic_on_oops=1 root=$${mender_kernel_root} rootfstype=ext4 ro rootwait quiet loglevel=3 systemd.show_status=1
booti $${kernel_addr_r} - $${fdt_addr_r}
run mender_try_to_recover
endef
export BOOTCMD_NILEORINOCOMINI_MENDER
nileorinocomini-fw_env.config-mender:
define FW_ENV_NILEORINOCOMINI_MENDER
/dev/$(BOOT_DEVICE) 0x400000 0x20000
/dev/$(BOOT_DEVICE) 0x800000 0x20000
endef
export FW_ENV_NILEORINOCOMINI_MENDER
rpi3b: rpi3b-boot-cmd rpi3b-fw_env.config rpi3b-config
tar xf u-boot-2021.04.tar.gz
patch -Np1 -d u-boot-2021.04 < u-boot-2021.04-serial-number-fix.patch
......
u-boot-2021.04-nileorinocomini.patch 0 → 100644
View file @ 05005439
diff -uNr u-boot-2021.04/arch/arm/dts/Makefile u-boot-2021.04-nileorinocomini/arch/arm/dts/Makefile
--- u-boot-2021.04/arch/arm/dts/Makefile 2021-04-05 15:03:29.000000000 +0000
+++ u-boot-2021.04-nileorinocomini/arch/arm/dts/Makefile 2025-03-24 22:23:10.000000000 +0000
@@ -323,7 +323,8 @@
zynqmp-zc1751-xm016-dc2.dtb \
zynqmp-zc1751-xm017-dc3.dtb \
zynqmp-zc1751-xm018-dc4.dtb \
- zynqmp-zc1751-xm019-dc5.dtb
+ zynqmp-zc1751-xm019-dc5.dtb \
+ system-top.dtb
dtb-$(CONFIG_ARCH_VERSAL) += \
versal-mini.dtb \
versal-mini-emmc0.dtb \
diff -uNr u-boot-2021.04/arch/arm/dts/pcw.dtsi u-boot-2021.04-nileorinocomini/arch/arm/dts/pcw.dtsi
--- u-boot-2021.04/arch/arm/dts/pcw.dtsi 1970-01-01 00:00:00.000000000 +0000
+++ u-boot-2021.04-nileorinocomini/arch/arm/dts/pcw.dtsi 2025-03-24 22:26:28.000000000 +0000
@@ -0,0 +1,133 @@
+&fclk0 {
+ status = "okay";
+};
+&gic {
+ num_cpus = <2>;
+ num_interrupts = <96>;
+};
+&lpd_dma_chan1 {
+ status = "okay";
+};
+&lpd_dma_chan2 {
+ status = "okay";
+};
+&lpd_dma_chan3 {
+ status = "okay";
+};
+&lpd_dma_chan4 {
+ status = "okay";
+};
+&lpd_dma_chan5 {
+ status = "okay";
+};
+&lpd_dma_chan6 {
+ status = "okay";
+};
+&lpd_dma_chan7 {
+ status = "okay";
+};
+&lpd_dma_chan8 {
+ status = "okay";
+};
+&xilinx_ams {
+ status = "okay";
+};
+&cci {
+ status = "okay";
+};
+&zynqmp_dpsub {
+ phy-names = "dp-phy0";
+ phys = <&psgtr 1 6 0 1>;
+ status = "okay";
+ xlnx,max-lanes = <1>;
+};
+&zynqmp_dpdma {
+ status = "okay";
+};
+&fpd_dma_chan1 {
+ status = "okay";
+};
+&fpd_dma_chan2 {
+ status = "okay";
+};
+&fpd_dma_chan3 {
+ status = "okay";
+};
+&fpd_dma_chan4 {
+ status = "okay";
+};
+&fpd_dma_chan5 {
+ status = "okay";
+};
+&fpd_dma_chan6 {
+ status = "okay";
+};
+&fpd_dma_chan7 {
+ status = "okay";
+};
+&fpd_dma_chan8 {
+ status = "okay";
+};
+&gpio {
+ emio-gpio-width = <32>;
+ gpio-mask-high = <0x0>;
+ gpio-mask-low = <0x5600>;
+ status = "okay";
+};
+&i2c0 {
+ clock-frequency = <400000>;
+ status = "okay";
+};
+&rtc {
+ status = "okay";
+};
+&sdhci0 {
+ clock-frequency = <187500000>;
+ status = "okay";
+ xlnx,mio-bank = <0x0>;
+};
+&psgtr {
+ status = "okay";
+};
+&spi0 {
+ is-decoded-cs = <0>;
+ num-cs = <1>;
+ status = "okay";
+};
+&ttc0 {
+ status = "okay";
+};
+&ttc1 {
+ status = "okay";
+};
+&ttc2 {
+ status = "okay";
+};
+&ttc3 {
+ status = "okay";
+};
+&uart0 {
+ cts-override ;
+ device_type = "serial";
+ port-number = <0>;
+ status = "okay";
+ u-boot,dm-pre-reloc ;
+};
+&lpd_watchdog {
+ status = "okay";
+};
+&watchdog0 {
+ status = "okay";
+};
+&pss_ref_clk {
+ clock-frequency = <33333333>;
+};
+&video_clk {
+ clock-frequency = <33333000>;
+};
+&ams_ps {
+ status = "okay";
+};
+&ams_pl {
+ status = "okay";
+};
diff -uNr u-boot-2021.04/arch/arm/dts/pl.dtsi u-boot-2021.04-nileorinocomini/arch/arm/dts/pl.dtsi
--- u-boot-2021.04/arch/arm/dts/pl.dtsi 1970-01-01 00:00:00.000000000 +0000
+++ u-boot-2021.04-nileorinocomini/arch/arm/dts/pl.dtsi 2025-03-24 22:30:26.000000000 +0000
@@ -0,0 +1,46 @@
+/ {
+ amba_pl: amba_pl@0 {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ compatible = "simple-bus";
+ ranges ;
+ misc_clk_0: misc_clk_0 {
+ #clock-cells = <0>;
+ clock-frequency = <322265625>;
+ compatible = "fixed-clock";
+ };
+ misc_clk_1: misc_clk_1 {
+ #clock-cells = <0>;
+ clock-frequency = <156250000>;
+ compatible = "fixed-clock";
+ };
+ misc_clk_2: misc_clk_2 {
+ #clock-cells = <0>;
+ clock-frequency = <24575977>;
+ compatible = "fixed-clock";
+ };
+ misc_clk_3: misc_clk_3 {
+ #clock-cells = <0>;
+ clock-frequency = <297000000>;
+ compatible = "fixed-clock";
+ };
+ misc_clk_4: misc_clk_4 {
+ #clock-cells = <0>;
+ clock-frequency = <148500000>;
+ compatible = "fixed-clock";
+ };
+ misc_clk_5: misc_clk_5 {
+ #clock-cells = <0>;
+ clock-frequency = <100000000>;
+ compatible = "fixed-clock";
+ };
+ PL_DDR_ddr4_0: ddr4@500000000 {
+ compatible = "xlnx,ddr4-2.2";
+ reg = <0x00000005 0x00000000 0x00000001 0x00000000>;
+ };
+ PL_DDR_ddr4_1: ddr4@4800000000 {
+ compatible = "xlnx,ddr4-2.2";
+ reg = <0x00000048 0x00000000 0x00000001 0x00000000>;
+ };
+ };
+};
diff -uNr u-boot-2021.04/arch/arm/dts/system-conf.dtsi u-boot-2021.04-nileorinocomini/arch/arm/dts/system-conf.dtsi
--- u-boot-2021.04/arch/arm/dts/system-conf.dtsi 1970-01-01 00:00:00.000000000 +0000
+++ u-boot-2021.04-nileorinocomini/arch/arm/dts/system-conf.dtsi 2025-03-24 22:31:01.000000000 +0000
@@ -0,0 +1,6 @@
+/ {
+ chosen {
+ bootargs = "console=ttyPS0,115200 earlyprintk root=/dev/ram";
+ stdout-path = "serial0:115200n8";
+ };
+};
diff -uNr u-boot-2021.04/arch/arm/dts/system-top.dts u-boot-2021.04-nileorinocomini/arch/arm/dts/system-top.dts
--- u-boot-2021.04/arch/arm/dts/system-top.dts 1970-01-01 00:00:00.000000000 +0000
+++ u-boot-2021.04-nileorinocomini/arch/arm/dts/system-top.dts 2025-03-24 22:31:42.000000000 +0000
@@ -0,0 +1,22 @@
+/dts-v1/;
+
+#include "zynqmp.dtsi"
+#include "zynqmp-clk-ccf.dtsi"
+#include "pl.dtsi"
+#include "pcw.dtsi"
+/ {
+ chosen {
+ bootargs = "earlycon";
+ stdout-path = "serial0:115200n8";
+ };
+ aliases {
+ i2c0 = &i2c0;
+ serial0 = &uart0;
+ spi0 = &spi0;
+ };
+ memory {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x7ff00000>, <0x00000008 0x00000000 0x0 0x80000000>;
+ };
+};
+#include "system-user.dtsi"
diff -uNr u-boot-2021.04/arch/arm/dts/system-user.dtsi u-boot-2021.04-nileorinocomini/arch/arm/dts/system-user.dtsi
--- u-boot-2021.04/arch/arm/dts/system-user.dtsi 1970-01-01 00:00:00.000000000 +0000
+++ u-boot-2021.04-nileorinocomini/arch/arm/dts/system-user.dtsi 2025-03-24 22:34:03.000000000 +0000
@@ -0,0 +1,267 @@
+#include <dt-bindings/gpio/gpio.h>
+/include/ "system-conf.dtsi"
+/ {
+ regulators {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg_ssd_vqmmc: regulator_ssd_vqmmc {
+ compatible = "regulator-gpio";
+ regulator-name = "ssd_vqmmc";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-type = "voltage";
+ gpios = <&gpio 43 0>;
+ gpios-states = <0>;
+ states = <3300000 0
+ 1800000 1>;
+ };
+ };
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ rpu0vdev0vring0: rpu0vdev0vring0@70040000 {
+ no-map;
+ reg = <0x0 0x70040000 0x0 0x4000>;
+ };
+ rpu0vdev0vring1: rpu0vdev0vring1@70044000 {
+ no-map;
+ reg = <0x0 0x70044000 0x0 0x4000>;
+ };
+ rpu0vdev0buffer: rpu0vdev0buffer@70048000 {
+ no-map;
+ reg = <0x0 0x70048000 0x0 0x100000>;
+ };
+ rproc_0_reserved: rproc@70000000 {
+ no-map;
+ reg = <0x0 0x70000000 0x0 0x40000>;
+ };
+ };
+
+ tcm_0a@ffe00000 {
+ no-map;
+ reg = <0x0 0xffe00000 0x0 0x10000>;
+ phandle = <0x40>;
+ status = "okay";
+ compatible = "mmio-sram";
+ power-domain = <&zynqmp_firmware 15>;
+ };
+
+ tcm_0b@ffe20000 {
+ no-map;
+ reg = <0x0 0xffe20000 0x0 0x10000>;
+ phandle = <0x41>;
+ status = "okay";
+ compatible = "mmio-sram";
+ power-domain = <&zynqmp_firmware 16>;
+ };
+
+ rf5ss@ff9a0000 {
+ compatible = "xlnx,zynqmp-r5-remoteproc";
+ xlnx,cluster-mode = <1>;
+ ranges;
+ reg = <0x0 0xFF9A0000 0x0 0x10000>;
+ #address-cells = <0x2>;
+ #size-cells = <0x2>;
+ r5f_0 {
+ compatible = "xilinx,r5f";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ sram = <0x40 0x41>;
+ memory-region = <&rproc_0_reserved>, <&rpu0vdev0buffer>, <&rpu0vdev0vring0>, <&rpu0vdev0vring1>;
+ power-domain = <&zynqmp_firmware 7>;
+ mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>;
+ mbox-names = "tx", "rx";
+ };
+ };
+
+ zynqmp_ipi1 {
+ compatible = "xlnx,zynqmp-ipi-mailbox";
+ interrupt-parent = <&gic>;
+ interrupts = <0 29 4>;
+ xlnx,ipi-id = <7>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ /* APU<->RPU0 IPI mailbox controller */
+ ipi_mailbox_rpu0: mailbox@ff990600 {
+ reg = <0xff990600 0x20>,
+ <0xff990620 0x20>,
+ <0xff9900c0 0x20>,
+ <0xff9900e0 0x20>;
+ reg-names = "local_request_region",
+ "local_response_region",
+ "remote_request_region",
+ "remote_response_region";
+ #mbox-cells = <1>;
+ xlnx,ipi-id = <1>;
+ };
+
+ };
+
+ refclk_dp: refclk_dp {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <27000000>;
+ };
+ retimer_clk: retimer_clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <148500000>;
+ };
+ cpu_opp_table {
+ opp00 {
+ opp-hz = /bits/ 64 <329166666>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <438888888>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <658333333>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <1316666666>;
+ };
+ };
+};
+&spi0 {
+ status = "okay";
+ num-cs = <1>;
+ spinode: spidev@0x0 {
+ compatible = "rohm,dh2228fv";
+ reg = <0>;
+ spi-max-frequency = <100000000>;
+ };
+};
+&uart0 {
+ status="okay";
+};
+&i2c0 {
+ clock-frequency = <400000>;
+ status = "okay";
+ si5341: clock-generator@76 {
+ reg = <0x76>;
+ compatible = "silabs,si5341";
+ #clock-cells = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&ref48>;
+ clock-names = "xtal";
+ clk0 {
+ reg = <0>;
+ always-on;
+ };
+ clk1 {
+ reg = <1>;
+ always-on;
+ };
+ clk2 {
+ reg = <2>;
+ always-on;
+ };
+ clk3 {
+ reg = <3>;
+ always-on;
+ };
+ clk4 {
+ reg = <4>;
+ always-on;
+ };
+ clk5 {
+ reg = <5>;
+ always-on;
+ };
+ clk6 {
+ reg = <6>;
+ always-on;
+ };
+ clk7 {
+ reg = <7>;
+ always-on;
+ };
+ clk9 {
+ reg = <9>;
+ always-on;
+ };
+ };
+ i2c_mux: msd9546@70 {
+ compatible = "nxp,pca9546";
+ reg = <0x70>;
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ gpio3: gpio@23 {
+ compatible = "ti,tca9535";
+ reg = <0x23>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+ };
+ i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+ i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ gpio1: gpio@20 {
+ compatible = "ti,tca6416";
+ reg = <0x20>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+ gpio2: gpio@21 {
+ compatible = "ti,tca6416";
+ reg = <0x21>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+ };
+ i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+ };
+};
+&sdhci0{
+ bus-width = <8>;
+};
+&rtc {
+ status = "disabled";
+};
+&fclk0 {
+ status = "okay";
+};
+&fclk1 {
+ status = "okay";
+};
+&fclk2 {
+ status = "okay";
+};
+&fclk3 {
+ status = "okay";
+};
+&psgtr {
+ status = "okay";
+ clocks = <&refclk_dp>;
+ clock-names = "ref1";
+};
+&amba_pl {
+ ref48: ref48M {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <48000000>;
+ };
+ xlnk {
+ compatible = "xlnx,xlnk-1.0";
+ };
+};
diff -uNr u-boot-2021.04/arch/arm/dts/zynqmp.dtsi u-boot-2021.04-nileorinocomini/arch/arm/dts/zynqmp.dtsi
--- u-boot-2021.04/arch/arm/dts/zynqmp.dtsi 2021-04-05 15:03:29.000000000 +0000
+++ u-boot-2021.04-nileorinocomini/arch/arm/dts/zynqmp.dtsi 2025-03-24 22:23:13.000000000 +0000
@@ -667,6 +667,15 @@
power-domains = <&zynqmp_firmware PD_QSPI>;
};
+ psgtr: phy@fd400000 {
+ compatible = "xlnx,zynqmp-psgtr-v1.1";
+ status = "disabled";
+ reg = <0x0 0xfd400000 0x0 0x40000>,
+ <0x0 0xfd3d0000 0x0 0x1000>;
+ reg-names = "serdes", "siou";
+ #phy-cells = <4>;
+ };
+
rtc: rtc@ffa60000 {
compatible = "xlnx,zynqmp-rtc";
status = "disabled";
@@ -962,6 +971,19 @@
};
};
+ zynqmp_dpdma: dma-controller@fd4c0000 {
+ compatible = "xlnx,zynqmp-dpdma";
+ status = "disabled";
+ reg = <0x0 0xfd4c0000 0x0 0x1000>;
+ interrupts = <0 122 4>;
+ interrupt-parent = <&gic>;
+ clock-names = "axi_clk";
+ power-domains = <&zynqmp_firmware PD_DP>;
+ dma-channels = <6>;
+ iommus = <&smmu 0xce4>;
+ #dma-cells = <1>;
+ };
+
xlnx_dpdma: dma@fd4c0000 {
compatible = "xlnx,dpdma";
status = "disabled";
diff -uNr u-boot-2021.04/board/xilinx/common/cpu-info.c u-boot-2021.04-nileorinocomini/board/xilinx/common/cpu-info.c
--- u-boot-2021.04/board/xilinx/common/cpu-info.c 1970-01-01 00:00:00.000000000 +0000
+++ u-boot-2021.04-nileorinocomini/board/xilinx/common/cpu-info.c 2025-03-24 22:23:13.000000000 +0000
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2014 - 2020 Xilinx, Inc.
+ * Michal Simek <michal.simek@xilinx.com>
+ */
+
+#include <common.h>
+#include <init.h>
+#include <soc.h>
+
+int print_cpuinfo(void)
+{
+ struct udevice *soc;
+ char name[SOC_MAX_STR_SIZE];
+ int ret;
+
+ ret = soc_get(&soc);
+ if (ret) {
+ printf("CPU: UNKNOWN\n");
+ return 0;
+ }
+
+ ret = soc_get_family(soc, name, SOC_MAX_STR_SIZE);
+ if (ret)
+ printf("CPU: %s\n", name);
+
+ ret = soc_get_revision(soc, name, SOC_MAX_STR_SIZE);
+ if (ret)
+ printf("Silicon: %s\n", name);
+
+ ret = soc_get_machine(soc, name, SOC_MAX_STR_SIZE);
+ if (ret)
+ printf("Chip: %s\n", name);
+
+ return 0;
+}
diff -uNr u-boot-2021.04/board/xilinx/common/Makefile u-boot-2021.04-nileorinocomini/board/xilinx/common/Makefile
--- u-boot-2021.04/board/xilinx/common/Makefile 2021-04-05 15:03:29.000000000 +0000
+++ u-boot-2021.04-nileorinocomini/board/xilinx/common/Makefile 2025-03-24 22:23:13.000000000 +0000
@@ -5,6 +5,9 @@
#
obj-y += board.o
+ifndef CONFIG_ARCH_ZYNQ
+obj-$(CONFIG_DISPLAY_CPUINFO) += cpu-info.o
+endif
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_CMD_FRU) += fru.o fru_ops.o
endif
diff -uNr u-boot-2021.04/board/xilinx/zynqmp/zynqmp.c u-boot-2021.04-nileorinocomini/board/xilinx/zynqmp/zynqmp.c
--- u-boot-2021.04/board/xilinx/zynqmp/zynqmp.c 2021-04-05 15:03:29.000000000 +0000
+++ u-boot-2021.04-nileorinocomini/board/xilinx/zynqmp/zynqmp.c 2025-03-25 07:43:18.000000000 +0000
@@ -10,6 +10,7 @@
#include <debug_uart.h>
#include <env.h>
#include <env_internal.h>
+#include <fdt_support.h>
#include <init.h>
#include <log.h>
#include <net.h>
@@ -39,7 +40,10 @@
#include "../common/board.h"
#include "pm_cfg_obj.h"
-
+#include <search.h>
+#include <errno.h>
+#include <asm/gpio.h>
+#include <i2c.h>
#define ZYNQMP_VERSION_SIZE 7
#define EFUSE_VCU_DIS_MASK 0x100
#define EFUSE_VCU_DIS_SHIFT 8
@@ -569,16 +573,6 @@
puts("Bootmode: ");
switch (bootmode) {
- case USB_MODE:
- puts("USB_MODE\n");
- mode = "usb";
- env_set("modeboot", "usb_dfu_spl");
- break;
- case JTAG_MODE:
- puts("JTAG_MODE\n");
- mode = "jtag pxe dhcp";
- env_set("modeboot", "jtagboot");
- break;
case QSPI_MODE_24BIT:
case QSPI_MODE_32BIT:
mode = "qspi0";
@@ -598,6 +592,8 @@
mode = "mmc";
bootseq = dev_seq(dev);
+ env_set("modeboot", "sdboot");
+ env_set("mmc_bootdev", "0");
break;
case SD_MODE:
puts("SD_MODE\n");
@@ -613,30 +609,11 @@
mode = "mmc";
bootseq = dev_seq(dev);
env_set("modeboot", "sdboot");
+ env_set("mmc_bootdev", "0");
break;
case SD1_LSHFT_MODE:
puts("LVL_SHFT_");
/* fall through */
- case SD_MODE1:
- puts("SD_MODE1\n");
- if (uclass_get_device_by_name(UCLASS_MMC,
- "mmc@ff170000", &dev) &&
- uclass_get_device_by_name(UCLASS_MMC,
- "sdhci@ff170000", &dev)) {
- puts("Boot from SD1 but without SD1 enabled!\n");
- return -1;
- }
- debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev));
-
- mode = "mmc";
- bootseq = dev_seq(dev);
- env_set("modeboot", "sdboot");
- break;
- case NAND_MODE:
- puts("NAND_MODE\n");
- mode = "nand0";
- env_set("modeboot", "nandboot");
- break;
default:
mode = "";
printf("Invalid Boot Mode:0x%x\n", bootmode);
@@ -679,7 +656,7 @@
int checkboard(void)
{
- puts("Board: Xilinx ZynqMP\n");
+ printf("Board: iWave SoM based on Zynq Ultrascale+ MPSoC\n");
return 0;
}
@@ -699,6 +676,8 @@
return ENVL_FAT;
if (IS_ENABLED(CONFIG_ENV_IS_IN_EXT4))
return ENVL_EXT4;
+ if (IS_ENABLED(CONFIG_ENV_IS_IN_MMC))
+ return ENVL_MMC;
return ENVL_UNKNOWN;
case NAND_MODE:
if (IS_ENABLED(CONFIG_ENV_IS_IN_NAND))
diff -uNr u-boot-2021.04/cmd/cmd_custom_memtests.c u-boot-2021.04-nileorinocomini/cmd/cmd_custom_memtests.c
--- u-boot-2021.04/cmd/cmd_custom_memtests.c 1970-01-01 00:00:00.000000000 +0000
+++ u-boot-2021.04-nileorinocomini/cmd/cmd_custom_memtests.c 2025-03-24 22:23:13.000000000 +0000
@@ -0,0 +1,537 @@
+/* This file contains the custom DDR memory tests as a part of POST
+ *
+ * The Memory tests will be done for
+ * 1. PS DDR : Data Line Integrity Test, Address Line Integrity Test,
+ * Pattern Test[Fixed Range],ECC Single bit and Double Bit Fail Test.
+ * 2. PL DDR : Data Line Integrity Test. Address Line Integrity Test,
+ * Pattern Test [Fixed Range]
+ */
+
+#include <common.h>
+#include <bootretry.h>
+#include <cli.h>
+#include <command.h>
+#ifdef CONFIG_HAS_DATAFLASH
+#include <dataflash.h>
+#endif
+#include <hash.h>
+#include <watchdog.h>
+#include <asm/io.h>
+#include <linux/compiler.h>
+#include <mapmem.h>
+
+#define HPS 0
+#define DBG 0
+#define START_ADDR 0x10000000
+#define END_ADDR 0x7f000000
+
+int ctrlc(void);
+
+int do_dl_test(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[])
+{
+ vu_long *addr,*dummy;
+ ulong dl_ps_err = 0;
+ ulong val, readback;
+ static const ulong bitpattern = 0x00000001;
+
+ addr = map_sysmem(0x10000000,0);
+ val = bitpattern;
+
+ dummy = map_sysmem(SYS_MEMTEST_SCRATCH,0);
+
+ for (; val != 0; val <<= 1) {
+#if DBG
+ printf("\n Writing value %08lx to address 0x%.8lx\n",val,(ulong)addr);
+#endif
+
+ *addr = val;
+ *dummy = ~val; /* writing this clears the data line bus */
+ readback = *addr;
+#if DBG
+ printf("\n Reading value %08lx to address 0x%.8lx \n",readback,(ulong)addr);
+#endif
+ if(readback != val) {
+ printf("FAILURE (data line): expected %08lx, actual %08lx\n", val, readback);
+ dl_ps_err++;
+ }
+
+#if DBG
+ printf("\n Writing value %08lx to address 0x%.8lx \n",~val,(ulong)addr);
+#endif
+
+ *addr = ~val;
+ *dummy = val;
+ readback = *addr;
+#if DBG
+ printf("\n Reading value %08lx to address 0x%.8lx \n",readback,(ulong)addr);
+#endif
+
+ if (readback != ~val) {
+ printf("FAILURE (data line): Is %08lx, should be %08lx\n",readback, ~val);
+ dl_ps_err++;
+ }
+ }
+
+ printf("PS DDR Data line test is done with ");
+ printf("%lu errors\r\n",dl_ps_err);
+
+ return 0;
+}
+
+int do_al_test(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[])
+{
+
+ vu_long pattern ,anti_pattern;
+ vu_long *addr;
+ vu_long test_offset;
+ vu_long offset;
+ vu_long temp;
+ ulong al_ps_err = 0;
+
+ addr = map_sysmem(0x00000000,0);
+ pattern = (vu_long) 0xaaaaaaaa;
+ anti_pattern = (vu_long) 0x55555555;
+
+ /* Write the pattern to the power-of-two offset locations*/
+ for(offset=1; offset < 4; offset <<=1)
+ addr[offset] = pattern;
+
+ test_offset = 0;
+
+ /* Write anti-pattern to the below location */
+ addr[test_offset] = anti_pattern;
+
+ /* All the address lines are set to 0 as we written pattern to offset
+ * Read the data ie.pattern from the power-of-two offset locations which has one address bit set to high
+ * If the pattern is re-written to anti-pattern to any one of the power-of-two offset locations
+ stuck-at high fault is detected at that address bit*/
+
+ for(offset =1 ;offset < 4; offset <<=1){
+ temp = addr[offset];
+ if(temp !=pattern){
+ printf("\nFAILURE: Address bit stuck high"
+ "@ 0x%.8lx: expected 0x%.8lx,"
+ " actual 0x%.8lx\n",
+ (uintptr_t)addr + offset*sizeof(vu_long),
+ pattern, temp);
+ al_ps_err++;
+ }
+ }
+ addr[test_offset] = pattern;
+
+ /*
+ * Check for addr bits stuck low or shorted.
+ */
+ for (test_offset = 1; test_offset < 4; test_offset <<= 1) {
+ addr[test_offset] = anti_pattern;
+
+ for (offset = 1; offset < 4; offset <<= 1) {
+ temp = addr[offset];
+ if ((temp != pattern) && (offset != test_offset)) {
+ printf("\nFAILURE: Address bit stuck low or"
+ " shorted @ 0x%.8lx: expected 0x%.8lx,"
+ " actual 0x%.8lx\n",
+ (uintptr_t)addr + offset*sizeof(vu_long),
+ pattern, temp);
+ al_ps_err++;
+ }
+ }
+ addr[test_offset] = pattern;
+ }
+ printf("PS DDR Address line test is done with ");
+ printf("%lu errors\r\n",al_ps_err);
+
+ return 0;
+}
+
+static ulong mem_test_alt(vu_long *buf, ulong start_addr, ulong end_addr,
+ vu_long *dummy)
+{
+ vu_long *addr;
+ ulong errs = 0;
+ ulong val, readback;
+ int j;
+ vu_long offset;
+ vu_long test_offset;
+ vu_long pattern;
+ vu_long temp;
+ vu_long anti_pattern;
+ vu_long num_words;
+ static const ulong bitpattern[] = {
+ 0x00000001, /* single bit */
+ 0x00000003, /* two adjacent bits */
+ 0x00000007, /* three adjacent bits */
+ 0x0000000F, /* four adjacent bits */
+ 0x00000005, /* two non-adjacent bits */
+ 0x00000015, /* three non-adjacent bits */
+ 0x00000055, /* four non-adjacent bits */
+ 0xaaaaaaaa, /* alternating 1/0 */
+ };
+
+ num_words = (end_addr - start_addr) / sizeof(vu_long);
+
+ /*
+ * Data line test: write a pattern to the first
+ * location, write the 1's complement to a 'parking'
+ * address (changes the state of the data bus so a
+ * floating bus doesn't give a false OK), and then
+ * read the value back. Note that we read it back
+ * into a variable because the next time we read it,
+ * it might be right (been there, tough to explain to
+ * the quality guys why it prints a failure when the
+ * "is" and "should be" are obviously the same in the
+ * error message).
+ *
+ * Rather than exhaustively testing, we test some
+ * patterns by shifting '1' bits through a field of
+ * '0's and '0' bits through a field of '1's (i.e.
+ * pattern and ~pattern).
+ */
+ addr = buf;
+ for (j = 0; j < sizeof(bitpattern) / sizeof(bitpattern[0]); j++) {
+ val = bitpattern[j];
+ for (; val != 0; val <<= 1) {
+ *addr = val;
+ *dummy = ~val; /* clear the test data off the bus */
+ readback = *addr;
+ if (readback != val) {
+ printf("FAILURE (data line): "
+ "expected %08lx, actual %08lx\n",
+ val, readback);
+ errs++;
+ if (ctrlc())
+ return -1;
+ }
+ *addr = ~val;
+ *dummy = val;
+ readback = *addr;
+ if (readback != ~val) {
+ printf("FAILURE (data line): "
+ "Is %08lx, should be %08lx\n",
+ readback, ~val);
+ errs++;
+ if (ctrlc())
+ return -1;
+ }
+ }
+ }
+
+ /*
+ * Based on code whose Original Author and Copyright
+ * information follows: Copyright (c) 1998 by Michael
+ * Barr. This software is placed into the public
+ * domain and may be used for any purpose. However,
+ * this notice must not be changed or removed and no
+ * warranty is either expressed or implied by its
+ * publication or distribution.
+ */
+
+ /*
+ * Address line test
+
+ * Description: Test the address bus wiring in a
+ * memory region by performing a walking
+ * 1's test on the relevant bits of the
+ * address and checking for aliasing.
+ * This test will find single-bit
+ * address failures such as stuck-high,
+ * stuck-low, and shorted pins. The base
+ * address and size of the region are
+ * selected by the caller.
+
+ * Notes: For best results, the selected base
+ * address should have enough LSB 0's to
+ * guarantee single address bit changes.
+ * For example, to test a 64-Kbyte
+ * region, select a base address on a
+ * 64-Kbyte boundary. Also, select the
+ * region size as a power-of-two if at
+ * all possible.
+ *
+ * Returns: 0 if the test succeeds, 1 if the test fails.
+ */
+ pattern = (vu_long) 0xaaaaaaaa;
+ anti_pattern = (vu_long) 0x55555555;
+
+ pr_debug("%s:%d: length = 0x%.8lx\n", __func__, __LINE__, num_words);
+ /*
+ * Write the default pattern at each of the
+ * power-of-two offsets.
+ */
+ for (offset = 1; offset < num_words; offset <<= 1)
+ addr[offset] = pattern;
+
+ /*
+ * Check for address bits stuck high.
+ */
+ test_offset = 0;
+ addr[test_offset] = anti_pattern;
+
+ for (offset = 1; offset < num_words; offset <<= 1) {
+ temp = addr[offset];
+ if (temp != pattern) {
+ printf("\nFAILURE: Address bit stuck high @ 0x%.8lx:"
+ " expected 0x%.8lx, actual 0x%.8lx\n",
+ start_addr + offset*sizeof(vu_long),
+ pattern, temp);
+ errs++;
+ if (ctrlc())
+ return -1;
+ }
+ }
+ addr[test_offset] = pattern;
+ WATCHDOG_RESET();
+
+ /*
+ * Check for addr bits stuck low or shorted.
+ */
+ for (test_offset = 1; test_offset < num_words; test_offset <<= 1) {
+ addr[test_offset] = anti_pattern;
+
+ for (offset = 1; offset < num_words; offset <<= 1) {
+ temp = addr[offset];
+ if ((temp != pattern) && (offset != test_offset)) {
+ printf("\nFAILURE: Address bit stuck low or"
+ " shorted @ 0x%.8lx: expected 0x%.8lx,"
+ " actual 0x%.8lx\n",
+ start_addr + offset*sizeof(vu_long),
+ pattern, temp);
+ errs++;
+ if (ctrlc())
+ return -1;
+ }
+ }
+ addr[test_offset] = pattern;
+ }
+
+ /*
+ * Description: Test the integrity of a physical
+ * memory device by performing an
+ * increment/decrement test over the
+ * entire region. In the process every
+ * storage bit in the device is tested
+ * as a zero and a one. The base address
+ * and the size of the region are
+ * selected by the caller.
+ *
+ * Returns: 0 if the test succeeds, 1 if the test fails.
+ */
+ num_words++;
+
+ /*
+ * Fill memory with a known pattern.
+ */
+ for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) {
+ WATCHDOG_RESET();
+ addr[offset] = pattern;
+ }
+
+ /*
+ * Check each location and invert it for the second pass.
+ */
+ for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) {
+ WATCHDOG_RESET();
+ temp = addr[offset];
+ if (temp != pattern) {
+ printf("\nFAILURE (read/write) @ 0x%.8lx:"
+ " expected 0x%.8lx, actual 0x%.8lx)\n",
+ start_addr + offset*sizeof(vu_long),
+ pattern, temp);
+ errs++;
+ if (ctrlc())
+ return -1;
+ }
+
+ anti_pattern = ~pattern;
+ addr[offset] = anti_pattern;
+ }
+
+ /*
+ * Check each location for the inverted pattern and zero it.
+ */
+ for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) {
+ WATCHDOG_RESET();
+ anti_pattern = ~pattern;
+ temp = addr[offset];
+ if (temp != anti_pattern) {
+ printf("\nFAILURE (read/write): @ 0x%.8lx:"
+ " expected 0x%.8lx, actual 0x%.8lx)\n",
+ start_addr + offset*sizeof(vu_long),
+ anti_pattern, temp);
+ errs++;
+ if (ctrlc())
+ return -1;
+ }
+ addr[offset] = 0;
+ }
+
+ return 0;
+}
+
+static ulong mem_test_quick(vu_long *buf, ulong start_addr, ulong end_addr,
+ vu_long pattern, int iteration)
+{
+ vu_long *end;
+ vu_long *addr;
+ ulong errs = 0;
+ ulong incr, length;
+ ulong val, readback;
+
+ /* Alternate the pattern */
+ incr = 1;
+ if (iteration & 1) {
+ incr = -incr;
+ /*
+ * Flip the pattern each time to make lots of zeros and
+ * then, the next time, lots of ones. We decrement
+ * the "negative" patterns and increment the "positive"
+ * patterns to preserve this feature.
+ */
+ if (pattern & 0x80000000)
+ pattern = -pattern; /* complement & increment */
+ else
+ pattern = ~pattern;
+ }
+ length = (end_addr - start_addr) / sizeof(ulong);
+ end = buf + length;
+ printf("\rPattern %08lX Writing..."
+ "%12s"
+ "\b\b\b\b\b\b\b\b\b\b",
+ pattern, "");
+ for (addr = buf, val = pattern; addr < end; addr++) {
+ WATCHDOG_RESET();
+ *addr = val;
+ val += incr;
+ }
+
+ puts("Reading...");
+
+ for (addr = buf, val = pattern; addr < end; addr++) {
+ WATCHDOG_RESET();
+ readback = *addr;
+ if (readback != val) {
+ ulong offset = addr - buf;
+
+ printf("\nMem error @ 0x%08X: "
+ "found %08lX, expected %08lX\n",
+ (uint)(uintptr_t)(start_addr + offset*sizeof(vu_long)),
+ readback, val);
+ errs++;
+ if (ctrlc())
+ return -1;
+ }
+ val += incr;
+ }
+
+ return 0;
+}
+
+/*
+ * Perform a memory test. A more complete alternative test can be
+ * configured using CONFIG_SYS_ALT_MEMTEST. The complete test loops until
+ * interrupted by ctrl-c or by a failure of one of the sub-tests.
+ */
+static int do_prtn_test(struct cmd_tbl *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ ulong start, end;
+ vu_long *buf, *dummy;
+ int iteration_limit;
+ int ret;
+ ulong errs = 0; /* number of errors, or -1 if interrupted */
+ ulong pattern;
+ int iteration;
+
+#if defined(CONFIG_SYS_ALT_MEMTEST)
+ const int alt_test = 1;
+#else
+ const int alt_test = 0;
+#endif
+ if (argc <= 3){
+ printf("--help\r\nptrn_test start end pattern\r\nEx: ptrn_test 0x10000000 0x10000010 0xAAAABBBB\r\n");
+ return 1;
+ }
+ else
+ {
+ start = simple_strtoul(argv[1], NULL, 16);
+
+ end = simple_strtoul(argv[2], NULL, 16);
+
+ pattern = (ulong)simple_strtoul(argv[3], NULL, 16);
+
+ iteration_limit = 1;
+ }
+ if ( start >= START_ADDR && end < END_ADDR)
+ printf("Pattern test for DDR memory..\n");
+ else{
+ errs = -1UL;
+ return -1;
+ }
+
+ printf("Testing %08x ... %08x:\n", (uint)start, (uint)end);
+ pr_debug("%s:%d: start %#08lx end %#08lx\n", __func__, __LINE__,
+ start, end);
+
+ buf = map_sysmem(start, end - start);
+ dummy = map_sysmem(SYS_MEMTEST_SCRATCH, sizeof(vu_long));
+ for (iteration = 0;
+ !iteration_limit || iteration < iteration_limit;
+ iteration++) {
+ if (ctrlc()) {
+ errs = -1UL;
+ break;
+ }
+#if DBG
+
+ printf("Iteration: %6d\r", iteration + 1);
+ pr_debug("\n");
+
+#endif
+ if (alt_test) {
+ errs = mem_test_alt(buf, start, end, dummy);
+ } else {
+ errs = mem_test_quick(buf, start, end, pattern,
+ iteration);
+ }
+ if (errs == -1UL)
+ break;
+ }
+
+ /*
+ * Work-around for eldk-4.2 which gives this warning if we try to
+ * case in the unmap_sysmem() call:
+ * warning: initialization discards qualifiers from pointer target type
+ */
+ {
+ void *vbuf = (void *)buf;
+ void *vdummy = (void *)dummy;
+
+ unmap_sysmem(vbuf);
+ unmap_sysmem(vdummy);
+ }
+
+ if (errs == -1UL) {
+ /* Memory test was aborted - write a newline to finish off */
+ putc('\n');
+ ret = 1;
+ } else {
+ if(errs > 0)
+ printf("Tested %d iteration(s) with %lu errors.\n",
+ iteration, errs);
+ else
+ printf("Test is done with %lu errors.\n", errs);
+ ret = errs != 0;
+ }
+
+ return ret; /* not reached */
+}
+
+U_BOOT_CMD(
+ dl_test, 1, 1, do_dl_test,
+ "data line integrity test for PS DDR",
+ ""
+);
+
+U_BOOT_CMD(al_test, 1, 1, do_al_test, "Address line integrity test for PS DDR", "");
+U_BOOT_CMD(ptrn_test, 4, 1, do_prtn_test, "simple RAM pattern test", "start end pattern");
+
diff -uNr u-boot-2021.04/cmd/Kconfig u-boot-2021.04-nileorinocomini/cmd/Kconfig
--- u-boot-2021.04/cmd/Kconfig 2021-04-05 15:03:29.000000000 +0000
+++ u-boot-2021.04-nileorinocomini/cmd/Kconfig 2025-03-24 22:23:13.000000000 +0000
@@ -737,6 +737,12 @@
within the range are displayed. The minimum number of characters
for a sequence to be considered a string can be provided.
+config CMD_DDR_TEST
+ bool "ddr_custom_test"
+ help
+ This is used for PS DDR custom memory tests such as data line integrity
+ test, address line integrity test and pattern test.
+
endmenu
menu "Compression commands"
diff -uNr u-boot-2021.04/cmd/Makefile u-boot-2021.04-nileorinocomini/cmd/Makefile
--- u-boot-2021.04/cmd/Makefile 2021-04-05 15:03:29.000000000 +0000
+++ u-boot-2021.04-nileorinocomini/cmd/Makefile 2025-03-24 22:23:13.000000000 +0000
@@ -29,6 +29,7 @@
obj-$(CONFIG_CMD_BLOCK_CACHE) += blkcache.o
obj-$(CONFIG_CMD_BMP) += bmp.o
obj-$(CONFIG_CMD_BOOTCOUNT) += bootcount.o
+obj-$(CONFIG_CMD_DDR_TEST) += cmd_custom_memtests.o
obj-$(CONFIG_CMD_BOOTEFI) += bootefi.o
obj-$(CONFIG_CMD_BOOTMENU) += bootmenu.o
obj-$(CONFIG_CMD_BOOTSTAGE) += bootstage.o
diff -uNr u-boot-2021.04/configs/zynqmp_nileorinocomini_defconfig u-boot-2021.04-nileorinocomini/configs/zynqmp_nileorinocomini_defconfig
--- u-boot-2021.04/configs/zynqmp_nileorinocomini_defconfig 1970-01-01 00:00:00.000000000 +0000
+++ u-boot-2021.04-nileorinocomini/configs/zynqmp_nileorinocomini_defconfig 2025-03-25 08:21:18.000000000 +0000
@@ -0,0 +1,358 @@
+CONFIG_CREATE_ARCH_SYMLINK=y
+CONFIG_SYS_CACHE_SHIFT_6=y
+CONFIG_SYS_CACHELINE_SIZE=64
+CONFIG_ARM=y
+CONFIG_SYS_ARCH="arm"
+CONFIG_SYS_CPU="armv8"
+CONFIG_SYS_SOC="zynqmp"
+CONFIG_SYS_VENDOR="xilinx"
+CONFIG_SYS_BOARD="zynqmp"
+CONFIG_SYS_CONFIG_NAME="zynqmp_nileorinocomini"
+CONFIG_ARM64=y
+CONFIG_STATIC_RELA=y
+CONFIG_DMA_ADDR_T_64BIT=y
+CONFIG_ARM_ASM_UNIFIED=y
+CONFIG_SYS_ARM_ARCH=8
+CONFIG_SYS_ARCH_TIMER=y
+CONFIG_ARM_SMCCC=y
+CONFIG_SPL_LDSCRIPT="arch/arm/cpu/armv8/u-boot-spl.lds"
+CONFIG_ARCH_ZYNQMP=y
+CONFIG_SYS_TEXT_BASE=0x8000000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SYS_MALLOC_LEN=0x4000000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=4
+CONFIG_SYS_MEMTEST_START=0
+CONFIG_SYS_MEMTEST_END=0x1000
+CONFIG_ENV_SIZE=0x20000
+CONFIG_DM_GPIO=y
+CONFIG_XILINX_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="system-top"
+CONFIG_ERR_PTR_OFFSET=0x0
+CONFIG_BOOTSTAGE_STASH_ADDR=0
+CONFIG_DEBUG_UART_BASE=0xFF000000
+CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_IDENT_STRING=" Xilinx ZynqMP Nile with Orinoco Mini"
+CONFIG_SPL_FS_FAT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_ZYNQ_SDHCI_MAX_FREQ=200000000
+CONFIG_XILINX_PS_INIT_FILE=""
+CONFIG_BOOT_SCRIPT_OFFSET=0x3E80000
+CONFIG_DEFINE_TCM_OCM_MMAP=y
+CONFIG_CMD_ZYNQMP=y
+CONFIG_PSCI_RESET=y
+CONFIG_IMX_DCD_ADDR=0x00910000
+CONFIG_BUILD_TARGET=""
+CONFIG_DEBUG_UART=y
+CONFIG_AHCI=y
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_MALLOC_F=y
+CONFIG_EXPERT=y
+CONFIG_SYS_MALLOC_CLEAR_ON_INIT=y
+CONFIG_PHYS_64BIT=y
+CONFIG_SYS_LOAD_ADDR=0x8000000
+CONFIG_PLATFORM_ELFENTRY="_start"
+CONFIG_STACK_SIZE=0x4000000
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FIT=y
+CONFIG_FIT_EXTERNAL_OFFSET=0x0
+CONFIG_FIT_VERBOSE=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_SYS_EXTRA_OPTIONS=""
+CONFIG_ARCH_FIXUP_FDT_MEMORY=y
+CONFIG_BOOTSTAGE_STASH_SIZE=0x1000
+CONFIG_SD_BOOT=y
+CONFIG_AUTOBOOT=y
+CONFIG_BOOTDELAY=4
+CONFIG_DEFAULT_FDT_FILE=""
+CONFIG_MENU=y
+CONFIG_LOGLEVEL=4
+CONFIG_SPL_LOGLEVEL=4
+CONFIG_TPL_LOGLEVEL=4
+CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
+CONFIG_DISPLAY_BOARDINFO=y
+CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_HASH=y
+CONFIG_SUPPORT_SPL=y
+CONFIG_SPL_SYS_STACK_F_CHECK_BYTE=0xaa
+CONFIG_CMDLINE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+CONFIG_SYS_LONGHELP=y
+CONFIG_SYS_PROMPT="NileOrinocoMini> "
+CONFIG_SYS_PROMPT_HUSH_PS2="> "
+CONFIG_SYS_XTRACE=y
+CONFIG_CMD_BDI=y
+CONFIG_CMD_CONSOLE=y
+CONFIG_CMD_BOOTD=y
+CONFIG_CMD_BOOTM=y
+CONFIG_CMD_BOOTI=y
+CONFIG_BOOTM_LINUX=y
+CONFIG_BOOTM_NETBSD=y
+CONFIG_BOOTM_PLAN9=y
+CONFIG_BOOTM_RTEMS=y
+CONFIG_BOOTM_VXWORKS=y
+CONFIG_CMD_ELF=y
+CONFIG_CMD_FDT=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_RUN=y
+CONFIG_CMD_IMI=y
+CONFIG_CMD_XIMG=y
+CONFIG_CMD_THOR_DOWNLOAD=y
+CONFIG_CMD_EXPORTENV=y
+CONFIG_CMD_IMPORTENV=y
+CONFIG_CMD_EDITENV=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_ENV_EXISTS=y
+CONFIG_CMD_CRC32=y
+CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_BUS=0
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=1
+CONFIG_SYS_EEPROM_SIZE=256
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=0
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=0
+CONFIG_CMD_MEMORY=y
+CONFIG_CMD_RANDOM=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_DDR_TEST=y
+CONFIG_CMD_LZMADEC=y
+CONFIG_CMD_UNZIP=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_DM=y
+CONFIG_CMD_FASTBOOT=y
+CONFIG_CMD_FPGA=y
+CONFIG_CMD_FPGA_LOADBP=y
+CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_FPGA_LOAD_SECURE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_RANDOM_UUID=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_LOADS=y
+CONFIG_CMD_MISC=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_ECHO=y
+CONFIG_CMD_ITEST=y
+CONFIG_CMD_SOURCE=y
+CONFIG_CMD_SETEXPR=y
+CONFIG_CMD_TIME=y
+CONFIG_MP=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_SYSBOOT=y
+CONFIG_CMD_AES=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_PARTITIONS=y
+CONFIG_DOS_PARTITION=y
+CONFIG_ISO_PARTITION=y
+CONFIG_EFI_PARTITION=y
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=128
+CONFIG_EFI_PARTITION_ENTRIES_OFF=0
+CONFIG_PARTITION_UUIDS=y
+CONFIG_SUPPORT_OF_CONTROL=y
+CONFIG_OF_CONTROL=y
+CONFIG_ENV_IS_IN_FAT=y
+CONFIG_ENV_FAT_INTERFACE="mmc"
+CONFIG_ENV_FAT_DEVICE_AND_PART="0:auto"
+CONFIG_ENV_FAT_FILE="uboot.env"
+CONFIG_DM=y
+CONFIG_DM_WARN=y
+CONFIG_DM_DEVICE_REMOVE=y
+CONFIG_DM_STDIO=y
+CONFIG_DM_SEQ_ALIAS=y
+CONFIG_SIMPLE_BUS=y
+CONFIG_OF_TRANSLATE=y
+CONFIG_DM_DEV_READ_INLINE=y
+CONFIG_BLK=y
+CONFIG_HAVE_BLOCK_DEVICE=y
+CONFIG_CLK=y
+CONFIG_CLK_ZYNQMP=y
+CONFIG_DFU=y
+CONFIG_DFU_RAM=y
+CONFIG_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x100000
+CONFIG_FASTBOOT_BUF_SIZE=0x6000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_GPT_NAME="gpt"
+CONFIG_FASTBOOT_MBR_NAME="mbr"
+CONFIG_FIRMWARE=y
+CONFIG_ARM_PSCI_FW=y
+CONFIG_ZYNQMP_FIRMWARE=y
+CONFIG_FPGA=y
+CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQMPPL=y
+CONFIG_CMD_PCA953X=y
+CONFIG_PCF8575_GPIO=y
+CONFIG_ZYNQ_GPIO=y
+CONFIG_DM_PCA953X=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_CADENCE=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
+CONFIG_INPUT=y
+CONFIG_DM_MAILBOX=y
+CONFIG_ZYNQMP_IPI=y
+CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
+CONFIG_FRU_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0
+CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0
+CONFIG_MMC=y
+CONFIG_MMC_WRITE=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_QUIRKS=y
+CONFIG_MMC_HW_PARTITIONING=y
+CONFIG_MMC_VERBOSE=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ZYNQ=y
+CONFIG_ZYNQ_SDHCI_MIN_FREQ=0
+CONFIG_BAUDRATE=115200
+CONFIG_REQUIRE_SERIAL_CONSOLE=y
+CONFIG_SERIAL_PRESENT=y
+CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART_ZYNQ=y
+CONFIG_DEBUG_UART_SHIFT=0
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ZYNQ_SERIAL=y
+CONFIG_SOC_XILINX_ZYNQMP=y
+CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
+CONFIG_FS_EXT4=y
+CONFIG_EXT4_WRITE=y
+CONFIG_FS_FAT=y
+CONFIG_FAT_WRITE=y
+CONFIG_FS_FAT_MAX_CLUSTSIZE=65536
+CONFIG_LIB_UUID=y
+CONFIG_PRINTF=y
+CONFIG_SPRINTF=y
+CONFIG_STRTO=y
+CONFIG_IMAGE_SPARSE=y
+CONFIG_IMAGE_SPARSE_FILLBUF_SIZE=0x80000
+CONFIG_SYS_HZ=1000
+CONFIG_PANIC_HANG=y
+CONFIG_REGEX=y
+CONFIG_LIB_RAND=y
+CONFIG_AES=y
+CONFIG_SHA1=y
+CONFIG_SHA256=y
+CONFIG_MD5=y
+CONFIG_LZMA=y
+CONFIG_GZIP=y
+CONFIG_ZLIB=y
+CONFIG_OF_LIBFDT=y
+CONFIG_OF_LIBFDT_ASSUME_MASK=0
+CONFIG_SPL_OF_LIBFDT=y
+CONFIG_SPL_OF_LIBFDT_ASSUME_MASK=0xff
+CONFIG_TPL_OF_LIBFDT_ASSUME_MASK=0xff
+CONFIG_MKIMAGE_DTC_PATH="dtc"
+CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x0
+CONFIG_ENV_IS_NOWHERE=y
+CONFIG_DM_USB_GADGET=y
+# CONFIG_CMD_THOR_DOWNLOAD is not set
+# CONFIG_BOOTM_NETBSD is not set
+# CONFIG_BOOTM_OPENRTOS is not set
+# CONFIG_BOOTM_OSE is not set
+# CONFIG_BOOTM_PLAN9 is not set
+# CONFIG_BOOTM_RTEMS is not set
+# CONFIG_BOOTM_VXWORKS is not set
+# CONFIG_CMD_BOOTEFI is not set
+# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_BOOTP is not set
+# CONFIG_CMD_DHCP is not set
+# CONFIG_BOOTP_BOOTPATH is not set
+# CONFIG_BOOTP_DNS is not set
+# CONFIG_BOOTP_DNS2 is not set
+# CONFIG_BOOTP_GATEWAY is not set
+# CONFIG_BOOTP_HOSTNAME is not set
+# CONFIG_BOOTP_PREFER_SERVERIP is not set
+# CONFIG_BOOTP_SUBNETMASK is not set
+# CONFIG_BOOTP_NTPSERVER is not set
+# CONFIG_CMD_PCAP is not set
+# CONFIG_BOOTP_PXE is not set
+# CONFIG_BOOTP_PXE_CLIENTARCH is not set
+# CONFIG_BOOTP_VCI_STRING is not set
+# CONFIG_CMD_TFTPBOOT is not set
+# CONFIG_NET_TFTP_VARS is not set
+# CONFIG_CMD_RARP is not set
+# CONFIG_CMD_NFS is not set
+# CONFIG_CMD_MII is not set
+# CONFIG_CMD_PING is not set
+# CONFIG_CMD_CDP is not set
+# CONFIG_CMD_SNTP is not set
+# CONFIG_CMD_DNS is not set
+# CONFIG_CMD_LINK_LOCAL is not set
+# CONFIG_CMD_ETHSW is not set
+# CONFIG_CMD_PXE is not set
+# CONFIG_CMD_TIME is not set
+# CONFIG_CMD_GETTIME is not set
+# CONFIG_CMD_SLEEP is not set
+# CONFIG_NET is not set
+# CONFIG_PROT_UDP is not set
+# CONFIG_BOOTP_SEND_HOSTNAME is not set
+# CONFIG_NET_RANDOM_ETHADDR is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_IP_DEFRAG is not set
+# CONFIG_TFTP_BLOCKSIZE is not set
+# CONFIG_TFTP_WINDOWSIZE is not set
+# CONFIG_SERVERIP_FROM_PROXYDHCP is not set
+# CONFIG_SERVERIP_FROM_PROXYDHCP_DELAY_MS is not set
+# CONFIG_DFU is not set
+# CONFIG_DFU_TFTP is not set
+# CONFIG_DFU_TIMEOUT is not set
+# CONFIG_DFU_MMC is not set
+# CONFIG_DFU_RAM is not set
+# CONFIG_CMD_PCA953X is not set
+# CONFIG_PCF8575_GPIO is not set
+# CONFIG_ROCKCHIP_GPIO is not set
+# CONFIG_XILINX_GPIO is not set
+# CONFIG_CMD_TCA642X is not set
+# CONFIG_TEGRA_GPIO is not set
+# CONFIG_TEGRA186_GPIO is not set
+# CONFIG_VYBRID_GPIO is not set
+# CONFIG_SIFIVE_GPIO is not set
+# CONFIG_ZYNQ_GPIO is not set
+# CONFIG_DM_74X164 is not set
+# CONFIG_DM_PCA953X is not set
+# CONFIG_DM_ETH is not set
+# CONFIG_DM_ETH_PHY is not set
+# CONFIG_NETDEVICES is not set
+# CONFIG_EFI_LOADER is not set
+# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
+# CONFIG_EFI_VARIABLE_FILE_STORE is not set
+# CONFIG_EFI_VARIABLES_PRESEED is not set
+# CONFIG_EFI_VAR_BUF_SIZE is not set
+# CONFIG_EFI_RUNTIME_UPDATE_CAPSULE is not set
+# CONFIG_EFI_CAPSULE_ON_DISK is not set
+# CONFIG_EFI_DEVICE_PATH_TO_TEXT is not set
+# CONFIG_EFI_DEVICE_PATH_UTIL is not set
+# CONFIG_EFI_DT_FIXUP is not set
+# CONFIG_EFI_LOADER_HII is not set
+# CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2 is not set
+# CONFIG_EFI_UNICODE_CAPITALIZATION is not set
+# CONFIG_EFI_LOADER_BOUNCE_BUFFER is not set
+# CONFIG_EFI_PLATFORM_LANG_CODES is not set
+# CONFIG_EFI_HAVE_RUNTIME_RESET is not set
+# CONFIG_EFI_LOAD_FILE2_INITRD is not set
+# CONFIG_EFI_SECURE_BOOT is not set
+# CONFIG_FPGA is not set
+# CONFIG_FPGA_ALTERA is not set
+# CONFIG_FPGA_SOCFPGA is not set
+# CONFIG_FPGA_XILINX is not set
+# CONFIG_FPGA_ZYNQMPPL is not set
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+# CONFIG_CMD_XIMG is not set
diff -uNr u-boot-2021.04/drivers/gpio/pca953x_gpio.c u-boot-2021.04-nileorinocomini/drivers/gpio/pca953x_gpio.c
--- u-boot-2021.04/drivers/gpio/pca953x_gpio.c 2021-04-05 15:03:29.000000000 +0000
+++ u-boot-2021.04-nileorinocomini/drivers/gpio/pca953x_gpio.c 2025-03-24 22:23:13.000000000 +0000
@@ -373,6 +373,7 @@
{ .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
{ .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
{ .compatible = "ti,tca9539", .data = OF_953X(16, PCA_INT), },
+ { .compatible = "ti,tca9535", .data = OF_953X(16, PCA_INT), },
{ .compatible = "onsemi,pca9654", .data = OF_953X(8, PCA_INT), },
diff -uNr u-boot-2021.04/drivers/misc/Kconfig u-boot-2021.04-nileorinocomini/drivers/misc/Kconfig
--- u-boot-2021.04/drivers/misc/Kconfig 2021-04-05 15:03:29.000000000 +0000
+++ u-boot-2021.04-nileorinocomini/drivers/misc/Kconfig 2025-03-24 23:10:36.000000000 +0000
@@ -377,7 +377,6 @@
help
Enable a generic driver for EEPROMs attached via I2C.
-
config SPL_I2C_EEPROM
bool "Enable driver for generic I2C-attached EEPROMs for SPL"
depends on MISC && SPL && SPL_DM
diff -uNr u-boot-2021.04/drivers/net/zynq_gem.c u-boot-2021.04-nileorinocomini/drivers/net/zynq_gem.c
--- u-boot-2021.04/drivers/net/zynq_gem.c 2021-04-05 15:03:29.000000000 +0000
+++ u-boot-2021.04-nileorinocomini/drivers/net/zynq_gem.c 2025-03-24 22:23:13.000000000 +0000
@@ -63,11 +63,7 @@
#define ZYNQ_GEM_NWCFG_FSREM 0x00020000 /* FCS removal */
#define ZYNQ_GEM_NWCFG_SGMII_ENBL 0x08000000 /* SGMII Enable */
#define ZYNQ_GEM_NWCFG_PCS_SEL 0x00000800 /* PCS select */
-#ifdef CONFIG_ARM64
-#define ZYNQ_GEM_NWCFG_MDCCLKDIV 0x00100000 /* Div pclk by 64, max 160MHz */
-#else
#define ZYNQ_GEM_NWCFG_MDCCLKDIV 0x000c0000 /* Div pclk by 48, max 120MHz */
-#endif
#ifdef CONFIG_ARM64
# define ZYNQ_GEM_DBUS_WIDTH (1 << 21) /* 64 bit bus */
diff -uNr u-boot-2021.04/include/autoconf.mk u-boot-2021.04-nileorinocomini/include/autoconf.mk
--- u-boot-2021.04/include/autoconf.mk 1970-01-01 00:00:00.000000000 +0000
+++ u-boot-2021.04-nileorinocomini/include/autoconf.mk 2025-03-25 00:00:56.000000000 +0000
@@ -0,0 +1,43 @@
+CONFIG_SYS_BOOTM_LEN="(60 * 1024 * 1024)"
+CONFIG_SYS_LOAD_ADDR=0x8000000
+CONFIG_SYS_CBSIZE=2048
+CONFIG_THOR_RESET_OFF=y
+CONFIG_SYS_SPL_MALLOC_SIZE=0x100000
+CONFIG_SYS_SPL_ARGS_ADDR=0x8000000
+CONFIG_CLOCKS=y
+CONFIG_SPL_FS_LOAD_KERNEL_NAME="atf-uboot.ub"
+CONFIG_SYS_MALLOC_LEN="(CONFIG_ENV_SIZE + 0x2000000)"
+CONFIG_SYS_I2C_SPEED=100000
+CONFIG_SYS_ATA_BASE_ADDR=0xb4000000
+CONFIG_REMAKE_ELF=y
+CONFIG_SPL_FS_LOAD_ARGS_NAME="u-boot.bin"
+CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0
+CONFIG_SYS_MAXARGS=64
+CONFIG_EXTRA_ENV_SETTINGS="ENV_MEM_LAYOUT_SETTINGS BOOTENV DFU_ALT_INFO"
+CONFIG_SPL_STACK=0xfffffffc
+CONFIG_ZYNQMP_NILEORINOCOMINI=y
+CONFIG_SYS_BOOT_RAMDISK_HIGH=y
+CONFIG_BOOTP_MAY_FAIL=y
+CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1800000
+CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0
+CONFIG_SPL_MAX_SIZE=0x40000
+CONFIG_ENV_OVERWRITE=y
+CONFIG_SYS_BAUDRATE_TABLE="{ 4800, 9600, 19200, 38400, 57600, 115200 }"
+CONFIG_VAL(option)="config_val(option)"
+CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
+CONFIG_SYS_INIT_SP_ADDR=$(CONFIG_SYS_TEXT_BASE)
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
+CONFIG_SPL_BSS_START_ADDR=0x0
+CONFIG_SYS_SPL_MALLOC_START=0x20000000
+CONFIG_SYS_PBSIZE="(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)"
+CONFIG_LMB=y
+CONFIG_SYS_BARGSIZE=$(CONFIG_SYS_CBSIZE)
+CONFIG_IS_ENABLED(option,...)="__concat(__CONFIG_IS_ENABLED_, __count_args(option, ##__VA_ARGS__)) (option, ##__VA_ARGS__)"
+CONFIG_IDE_PREINIT=y
+CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0
+CONFIG_GICV2=y
+CONFIG_CPU_ARMV8=y
+CONFIG_SYS_ATA_IDE0_OFFSET=0
+CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
+CONFIG_BOARDDIR="board/xilinx/zynqmp"
diff -uNr u-boot-2021.04/include/autoconf.mk.dep u-boot-2021.04-nileorinocomini/include/autoconf.mk.dep
--- u-boot-2021.04/include/autoconf.mk.dep 1970-01-01 00:00:00.000000000 +0000
+++ u-boot-2021.04-nileorinocomini/include/autoconf.mk.dep 2025-03-25 00:00:35.000000000 +0000
@@ -0,0 +1,85 @@
+include/config/auto.conf: include/common.h include/linux/kconfig.h \
+ include/generated/autoconf.h include/config.h include/config_uncmd_spl.h \
+ include/configs/zynqmp_nileorinocomini.h include/configs/xilinx_zynqmp.h \
+ include/config_distro_bootcmd.h arch/arm/include/asm/config.h \
+ include/linux/kconfig.h include/config_fallbacks.h include/errno.h \
+ include/linux/errno.h include/time.h include/linux/typecheck.h \
+ include/linux/types.h include/linux/posix_types.h include/linux/stddef.h \
+ arch/arm/include/asm/posix_types.h arch/arm/include/asm/types.h \
+ include/asm-generic/int-ll64.h \
+ /usr/lib/gcc/aarch64-amlogic-linux-gnueabi/10.1.0/include/stdbool.h \
+ include/linux/printk.h include/log.h include/stdio.h \
+ /usr/lib/gcc/aarch64-amlogic-linux-gnueabi/10.1.0/include/stdarg.h \
+ include/linux/compiler.h include/linux/compiler_types.h \
+ include/linux/compiler_attributes.h include/linux/compiler-gcc.h \
+ include/linker_lists.h include/dm/uclass-id.h include/linux/bitops.h \
+ include/asm-generic/bitsperlong.h include/linux/kernel.h \
+ arch/arm/include/asm/bitops.h include/asm-generic/bitops/__ffs.h \
+ include/asm-generic/bitops/__fls.h include/asm-generic/bitops/fls.h \
+ include/asm-generic/bitops/fls64.h \
+ arch/arm/include/asm/proc-armv/system.h include/linux/list.h \
+ include/linux/poison.h include/linux/string.h \
+ arch/arm/include/asm/string.h include/linux/linux_string.h \
+ arch/arm/include/asm/u-boot.h include/asm-generic/u-boot.h \
+ arch/arm/include/asm/u-boot-arm.h include/display_options.h \
+ include/vsprintf.h include/env_internal.h include/compiler.h \
+ /usr/lib/gcc/aarch64-amlogic-linux-gnueabi/10.1.0/include/stddef.h \
+ arch/arm/include/asm/byteorder.h include/linux/byteorder/little_endian.h \
+ include/linux/byteorder/swab.h include/linux/byteorder/generic.h
+include/linux/kconfig.h:
+include/generated/autoconf.h:
+include/config.h:
+include/config_uncmd_spl.h:
+include/configs/zynqmp_nileorinocomini.h:
+include/configs/xilinx_zynqmp.h:
+include/config_distro_bootcmd.h:
+arch/arm/include/asm/config.h:
+include/linux/kconfig.h:
+include/config_fallbacks.h:
+include/errno.h:
+include/linux/errno.h:
+include/time.h:
+include/linux/typecheck.h:
+include/linux/types.h:
+include/linux/posix_types.h:
+include/linux/stddef.h:
+arch/arm/include/asm/posix_types.h:
+arch/arm/include/asm/types.h:
+include/asm-generic/int-ll64.h:
+/usr/lib/gcc/aarch64-amlogic-linux-gnueabi/10.1.0/include/stdbool.h:
+include/linux/printk.h:
+include/log.h:
+include/stdio.h:
+/usr/lib/gcc/aarch64-amlogic-linux-gnueabi/10.1.0/include/stdarg.h:
+include/linux/compiler.h:
+include/linux/compiler_types.h:
+include/linux/compiler_attributes.h:
+include/linux/compiler-gcc.h:
+include/linker_lists.h:
+include/dm/uclass-id.h:
+include/linux/bitops.h:
+include/asm-generic/bitsperlong.h:
+include/linux/kernel.h:
+arch/arm/include/asm/bitops.h:
+include/asm-generic/bitops/__ffs.h:
+include/asm-generic/bitops/__fls.h:
+include/asm-generic/bitops/fls.h:
+include/asm-generic/bitops/fls64.h:
+arch/arm/include/asm/proc-armv/system.h:
+include/linux/list.h:
+include/linux/poison.h:
+include/linux/string.h:
+arch/arm/include/asm/string.h:
+include/linux/linux_string.h:
+arch/arm/include/asm/u-boot.h:
+include/asm-generic/u-boot.h:
+arch/arm/include/asm/u-boot-arm.h:
+include/display_options.h:
+include/vsprintf.h:
+include/env_internal.h:
+include/compiler.h:
+/usr/lib/gcc/aarch64-amlogic-linux-gnueabi/10.1.0/include/stddef.h:
+arch/arm/include/asm/byteorder.h:
+include/linux/byteorder/little_endian.h:
+include/linux/byteorder/swab.h:
+include/linux/byteorder/generic.h:
diff -uNr u-boot-2021.04/include/config_distro_bootcmd.h u-boot-2021.04-nileorinocomini/include/config_distro_bootcmd.h
--- u-boot-2021.04/include/config_distro_bootcmd.h 2021-04-05 15:03:29.000000000 +0000
+++ u-boot-2021.04-nileorinocomini/include/config_distro_bootcmd.h 2025-03-24 23:13:32.000000000 +0000
@@ -489,6 +489,13 @@
\
BOOT_TARGET_DEVICES(BOOTENV_DEV) \
\
+ "sdboot=mmc dev $sdbootdev && mmcinfo; " \
+ "echo Copying Linux from mmc$sdbootdev to RAM... && " \
+ "load mmc $sdbootdev ${fdt_addr_r} system.dtb && load mmc $sdbootdev ${kernel_addr_r} Image && " \
+ "load mmc $sdbootdev ${ramdisk_addr_r} rootfs.cpio.gz.u-boot && "\
+ "booti ${kernel_addr_r} ${ramdisk_addr_r} ${fdt_addr_r}\0" \
+ "modeboot=sdboot\0" \
+ "sdbootdev=0\0" \
"distro_bootcmd=" BOOTENV_SET_SCSI_NEED_INIT \
BOOTENV_SET_NVME_NEED_INIT \
BOOTENV_SET_IDE_NEED_INIT \
diff -uNr u-boot-2021.04/include/config.h u-boot-2021.04-nileorinocomini/include/config.h
--- u-boot-2021.04/include/config.h 1970-01-01 00:00:00.000000000 +0000
+++ u-boot-2021.04-nileorinocomini/include/config.h 2025-03-24 23:14:31.000000000 +0000
@@ -0,0 +1,7 @@
+/* Automatically generated - do not edit */
+#define CONFIG_BOARDDIR board/xilinx/zynqmp
+#include <config_uncmd_spl.h>
+#include <configs/zynqmp_nileorinocomini.h>
+#include <asm/config.h>
+#include <linux/kconfig.h>
+#include <config_fallbacks.h>
diff -uNr u-boot-2021.04/include/configs/xilinx_zynqmp.h u-boot-2021.04-nileorinocomini/include/configs/xilinx_zynqmp.h
--- u-boot-2021.04/include/configs/xilinx_zynqmp.h 2021-04-05 15:03:29.000000000 +0000
+++ u-boot-2021.04-nileorinocomini/include/configs/xilinx_zynqmp.h 2025-03-24 23:24:18.000000000 +0000
@@ -19,6 +19,10 @@
#define GICD_BASE 0xF9010000
#define GICC_BASE 0xF9020000
+#ifndef SYS_MEMTEST_SCRATCH
+# define SYS_MEMTEST_SCRATCH 0x10800000
+#endif
+
#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
/* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */
@@ -111,9 +115,16 @@
"script_size_f=0x80000\0" \
#if defined(CONFIG_MMC_SDHCI_ZYNQ)
-# define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1)
+#define BOOTENV_DEV_MMC_AUTO(devtypeu, devtypel, instance) \
+ BOOTENV_DEV_MMC(MMC, mmc, 0) \
+ "bootcmd_mmc_auto=run bootcmd_mmc0;\0"
+
+#define BOOTENV_DEV_NAME_MMC_AUTO(devtypeu, devtypel, instance) \
+ "mmc_auto "
+
+#define BOOT_TARGET_DEVICES_MMC(func) func(MMC_AUTO, mmc_auto, na)
#else
-# define BOOT_TARGET_DEVICES_MMC(func)
+#define BOOT_TARGET_DEVICES_MMC(func)
#endif
#if defined(CONFIG_SATA_CEVA)
@@ -180,7 +191,6 @@
"jtag "
#define BOOT_TARGET_DEVICES(func) \
- BOOT_TARGET_DEVICES_JTAG(func) \
BOOT_TARGET_DEVICES_MMC(func) \
BOOT_TARGET_DEVICES_QSPI(func) \
BOOT_TARGET_DEVICES_NAND(func) \
diff -uNr u-boot-2021.04/include/configs/zynqmp_nileorinocomini.h u-boot-2021.04-nileorinocomini/include/configs/zynqmp_nileorinocomini.h
--- u-boot-2021.04/include/configs/zynqmp_nileorinocomini.h 1970-01-01 00:00:00.000000000 +0000
+++ u-boot-2021.04-nileorinocomini/include/configs/zynqmp_nileorinocomini.h 2025-03-24 23:25:04.000000000 +0000
@@ -0,0 +1,10 @@
+#ifndef CONFIG_ZYNQMP_NILEORINOCOMINI_H
+#define CONFIG_ZYNQMP_NILEORINOCOMINI_H
+
+#define CONFIG_ENV_OVERWRITE 1
+
+#define CONFIG_SYS_I2C_SPEED 100000
+
+#include <configs/xilinx_zynqmp.h>
+
+#endif /* __CONFIG_ZYNQMP_NILEORINOCOMINI_H */
diff -uNr u-boot-2021.04/scripts/config_whitelist.txt u-boot-2021.04-nileorinocomini/scripts/config_whitelist.txt
--- u-boot-2021.04/scripts/config_whitelist.txt 2021-04-05 15:03:29.000000000 +0000
+++ u-boot-2021.04-nileorinocomini/scripts/config_whitelist.txt 2025-03-24 23:27:45.000000000 +0000
@@ -3986,4 +3986,5 @@
CONFIG_YAFFS_WINCE
CONFIG_YELLOW_LED
CONFIG_ZLT
+CONFIG_ZYNQMP_NILEORINOCOMINI_H
CONFIG_eTSEC_MDIO_BUS
diff -uNr u-boot-2021.04/tools/imx8image.c u-boot-2021.04-nileorinocomini/tools/imx8image.c
--- u-boot-2021.04/tools/imx8image.c 2021-04-05 15:03:29.000000000 +0000
+++ u-boot-2021.04-nileorinocomini/tools/imx8image.c 2025-03-25 08:23:56.000000000 +0000
@@ -365,7 +365,7 @@
struct stat sbuf;
unsigned char *ptr;
int tail;
- int zero = 0;
+ long int zero = 0;
uint8_t zeros[4096];
int size, ret;
diff -uNr u-boot-2021.04/tools/imx8mimage.c u-boot-2021.04-nileorinocomini/tools/imx8mimage.c
--- u-boot-2021.04/tools/imx8mimage.c 2021-04-05 15:03:29.000000000 +0000
+++ u-boot-2021.04-nileorinocomini/tools/imx8mimage.c 2025-03-25 08:24:14.000000000 +0000
@@ -248,7 +248,7 @@
struct stat sbuf;
unsigned char *ptr;
int tail;
- int zero = 0;
+ long int zero = 0;
uint8_t zeros[4096];
int size, ret;
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